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5-1-2. IC301 CXD9511AQ (DOLBY DIGITAL (AC-3)/PRO LOGIC, DTS DECODER)
Pin No.
Pin Name
I/O
Pin Description
1
VDD1
I
Power supply pin (+5 V)
2
RAMCEN
—
Not used. (Open)
3 • 4
RAM16 • 15
—
Not used. (Open)
5
SDIB0
I
PCM signal input
6 • 7
SDIB1 • 2
—
Not used. (Open)
8
XI
I
External system clock signal input (12.288 MHz)
9
XO
—
Not used. (Open)
10
VSS
—
Ground
11
AVDD
I
Power supply pin (+3.3 V)
12
SDIB3
—
Not used. (Open)
13 • 14
TEST
—
Test pin
15
OVFB
—
Not used. (Open)
16
DTSDATA
—
Not used. (Open)
17
AC3DATA
—
Not used. (Open)
18
SPDOB3
—
Not used. (Open)
19
CPO
O
PLL signal output
20
AVSS
—
Ground
21
ADD2
I
Power supply pin
22
SDOA2
O
PCM signal output (C, LFE output)
23
SDOA1
O
PCM signal output (LS, RS output)
24
SDOA0
O
PCM signal output (L, R output)
25 – 29
RAMA14 – 10
—
Not used. (Open)
30
VSS
—
Ground
31
VDD1
I
Power supply pin (+5 V)
32 – 39
OPORT0 – 7
—
Not used. (Open)
40
VSS
—
Ground
41
VDD2
I
Power supply pin (+3.3 V)
42 – 44
RAMA9 – 7
—
Not used. (Open)
45
SDOB2
—
Not used. (Open)
46
SDOB1
O
PCM signal output
47
SDOB0
O
PCM signal output
48
SDBCK1
—
Not used. (Open)
49
SDWCK1
—
Not used. (Open)
—
Ground
I
Power supply pin (+3.3 V)
—
Not used. (Open)
—
Not used. (Open)
O
Auto mute detect signal output
—
Not used. (Open)
—
Not used. (Open)
O
SDBCK0 turn over clock signal output
—
Not used. (Open)
—
Ground
61
RAMA4
—
Not used. (Open)
62
IC
I
Initial clear terminal
63
TEST
—
Test pin
64
RAMA3
—
Not used. (Open)
65
CSB
I
Sub DSP chip select signal input
66
CS
I
Interface chip select signal input
67
SO
O
Interface data signal output
68
SI
I
Interface and sub DSP data signal input
69
SCK
I
Interface and sub DSP clock signal input
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