Sony CSD-TD10, Руководство по обслуживанию

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17
CSD-TD10/TD30
1 to 9 S1/OT5-S9/OT13 O LCD segment output: LCD601 1pin-9pin.
10 S10/OT14/ZDNET O LCD segment output: LCD601 10pin.
11 S11/OT15/CLCK O LCD segment output: LCD601 11pin.
12 S12/OT16/DATA O LCD segment output: LCD601 12pin.
13 S13/OT17/SFSY O LCD segment output: LCD601 13pin.
14 S14/OT18/LRCK O LCD segment output: LCD601 14pin.
15 P8-0/S15/BCK O Changed to the port that detects use/non-use of O-BEAT L: Use, H: Non-use.
16 P8-1/S16/AOUT O Not connected.
17 P8-2/S17/MBOV O Connecting to VDD (+5V).
18 P8-3/S18/IPF O Not connected.
19 MV
DD
— Controller power 5V.
20 MV
SS
— Controller power supply GND.
21 P1-0 I/O CD door switch open/close detection: “L” input at close.
22 P1-1 I/O Function CD input.
23 P1-2 I/O Function TU input.
24 P1-3 I/O Function TAPE input.
25 P3-0 I/O Not connected.
26 P3-1/ADin1 A/D-I KEY input.
27 P3-2/ADin2 A/D-I TUNER destination identification.
28 P3-3/ADin3 I/O INSIDE LIMIT switch detection.
29 P4-0/ADin4/BUZR I/O Not connected.
30 P4-1/S12 I Data input from TU IC (LC72131).
31 P4-2/SI0/SI1/SDA O Data output to TU IC (LC72131).
32 P4-3/SCK/SCL O Clock output to TU IC (LC72131).
33 P2-0/EMPH in O CE output to TU IC (LC72131).
34 P2-1/HSO in I/O Not connected.
35 P2-2/LRCK in I/O FM stereo status input: “L” input at stereo.
36 P2-3/DATA in O AM beat selector output — When AC bias is used.
37 IN1/BCK in I Not connected.
38 TESTC I Not connected.
39 OT19/HSO O Main mute output.
40 OT20/SPCK O Not connected.
41 OT21/SPDA O TU ON control signal output.
42 OT22/COPS O CD ON control signal output.
43 DOUT O DIGITAL OUT output. (Not used)
44 SBSY O Subcode block output. (Not used)
45 SBOK O Subcode Q-data CRCC judgment result output. (Not used)
46 V
DD
— CD section digital system power supply: +5V.
47 V
SS
— CD section digital system GND.
48 P2V
REF
— PLL system-2 V
REF
terminal.
49 PDO — Difference signal between EFM signal and PLCK signal is output.
50 TMAX O TMAX detection result is output.
51 LPFN I Inverted input to low-pass filter amplifier.
52 LPFO O Low-pass filter amplifier output.
53 PV
REF
— PLL system V
REF
terminal.
54 VCOF I VCO filter.
55 AV
SS
— Analog system GND.
56 SLCO O DAC output for generating data slice level.
57 RFI I RF signal input.
58 AV
DD
— Analog system power supply: 5V.
59 RFCT I RFRP signal center level input.
SECTION 6
DIAGRAMS
6-1. IC PIN DESCRIPTION
• IC601 TC94A23F-704BH (SYSTEM CONTROL)
Pin No. Pin Name I/O Pin Description