Sony CDX-616, Руководство по обслуживанию

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CDX-616
– 19 – – 20 –
SECTION 7
DIAGRAMS
XROF
M
M
M
A
B
D
F
E
C I-V AMP
DETECTOR
39
38
2
1
12
13
27
OUT+
OUT–
SLO
OUT–
OUT+
OUT+
OUT–
SPINDLE
MOTOR DRIVE
M101
(SPINDLE)
SLED
MOTOR DRIVE
26
M102
(SLED)
FOCUS
COIL DRIVE
TRACKING
COIL DRIVE
OUT+
OUT–
19
24
4
10
IN
IN
IN
IN
SLP
FOCUS/TRACKING COIL DRIVE,
SPINDLE/SLED MOTOR DRIVE
IC51
16 14
SLED
AMP
LD
PD
LASER DIODE
OPTICAL PICK-UP
(KSS-521A)
2-AXIS
DEVICE
(FOCUS)
(TRACKING)
33
32
27
44
23
22
20
21
19
23
RF AMP,
FOCUS/TRACKING
SERVO
IC11 (1/2)
FOCUS OK
COMPARATOR
MIRR
AMP
DEFECT
AMP
FOCUS OK
AMP
IIL DATA REGISTER
40 38
FILTER
42 39
FILO
PCO
CLTV
FILI
DIGITAL PLL
ASYMMETRY
CORRECTION
EFM
DEMODULATOR
DIGITAL
OUT
ERROR
CORRECTOR
16K
RAM
INTERNAL BUS
SUB-CODE
PROCESSOR
SERVO AUTO SEQUENCER
DIGITAL CLV
17
15
52
54
50
100
16
8 7 9 10 12 11 75 76 77 61 26 28
14
13
1
7
4
5
4
5
CH.F
CH.R
CHUCKING
MOTOR DRIVE
CHUCKING MOTOR DRIVE
IC52
FIN
RIN
OUT1
OUT2
SW11
(CHUCKING END DETECT)
LOAD1
LOAD2
SW12
(SAVE END DETECT)
SW1
(LIMIT)
M103
(CHUCKING)
41
42
36
37
1
40
45
2
47
17
16
6
25
24
13
+
PD1
PD1 I-V AMP
RFO
RF
46
ASYI
47
ASYO
FOK
DATO
CLKO
XLTO
SEIN
CNIN
C.OUT
FOK
SUBQ
SCLK
SENS
CD.DATA
CD.CLK
CD.XLT
SCOR
MON MDP MDS
29
LOCK
64
SQSO SQCK SENS DATA CLOCK XLAT SCOR SBSO EXCK GFS
GTOP
WFCK
EMPH
C4M
XRST
RFI
FOK
DATA
CLK
SENS1
26
SENS2
C.OUT
XLT
LOCK
XRST
PD2 I-V AMP
PD2
TTL
IIL
FEO
TEO
PD
FEI
FEO
TAO
TEI
TTL
IIL
TTL
IIL
FOCUS
ERROR
AMP
RF
SUMMING
AMP
TRACKING
ERROR
AMP
TRACKING PHASE
COMPENSATION
FOCUS PHASE
COMPENSATION
AUTOMATIC
POWER CONTROL
Q11
I-V
AMP
LD
AMP
PD
AMP
FE BIAS
RV14
F
E
LD
89
XTAI
PCMD
71
D.OUT
BCKO
LRCK
63
C2PO
62
49
RFCK
PCMD
BCK
LRCK
PCMD
BCK
LRCK
WDCK
XRST
SLED SERVO
IC11 (2/2)
05
DIGITAL SIGNAL PROCESSOR,
CLV SERVO
IC101
SYSTEM CONTROLLER
IC201 (1/2)
ON : When completion of the disc
chucking operation.
ON : When completion of the disc
chucking operation.
ON : When the optical pick-up
is inner position.
• SIGNAL PATH
(Page 21)
: CD PLAY
27
FOCUS
GAIN
CPU INTERFACE
D/A
INTERFACE
CLOCK
GENERATOR
70
74
72
58
WFCK
SCLK
SBSO
22
SENS2 8
54 52
51
23
67
65
66
63
GFS 24
21
C
(Page 21)
B
(Page 21)
A
SCOR
(Page 21) D
LIM.SW 9
7
6
DIGITAL FILTER, D/A CONVERTER,
LOW-PASS FILTER
IC601
SERIAL
INPUT
INTERFACE
TIMING
GENERATOR
CPU
INTERFACE
OSC
MUTING
CONTROL SWITCH
Q601, 602
MUTING
Q610
LOW-PASS
FILTER
DIGITAL
FILTER
CIRCUIT
∆Σ
MODULATOR
CIRCUIT
DATA
BCK
LRCK
MCK
X601
16.9344MHz
RO
LO
HS EMP XO XI
21 19 16 15
9
5
22
23
24
13
MUTING
Q620
R
L
CN901 (1/2)
AUDIO OUT
EMP
ML
44
45
A.MUTE 43
7-1. BLOCK DIAGRAM – SERVO/DA CONVERTER Section –