A
B
C
D
E
F
G
H
I
J
K
L
M
N
1
2
3
4
5
6
7
8
9
10
11
O
- 66 -
~ N Board Schematic Diagram [ Digital Decoder ] Page 7/7 ~
nSW_FE_RESET
nFE_RST
CI_BYPASS
GPO_CLK
CI_PWR_EN
nCI_WAIT
nRDY_DAMON
20
19
18
17
16
15
14
13
12
11
12345678
91
0
IC3801
74LVC273PW
!CL!
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
CLK
5Q
5D
6D
6Q
7Q
7D
8D
8Q
VCC
nSW_FE_RESET
nRESET
CI_EN
NVM_WP
20
19
18
17
16
15
14
13
12
11
12345678
91
0
74LVC273PW
!CL!
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
CLK
5Q
5D
6D
6Q
7Q
7D
8D
8Q
VCC
nRESET
MODEM_EN
PCCARD_EN
NVM_RST
nMODEM_OVR
JIG_MODE
nSMC_INT
+3V3D
nBOARD_RST
16V
10
C3802
nDAMON_RST
GCSB0
FWEB
FOEB
GPO_CLK
nCI_EN
nPC_EN
nCIPC_EN
RDATA[0-15]
RADD[0-25]
FTV_CONFIG[1]
PPORT3
PPORT4
FTV_CONFIG[2]
PPORT1
+3V3D
GCSB0
nMASTER_RESET
SDA_N
SCL_N
NVM_WP
0uH
FB3803
nNAND_WP
+3V3D
Q3801
DTC114EKA-T146
Q3804
DTC114EKA-T146
Q3800
DTC114EKA-T146
DTC114EKA-T146
Q3805
D3802
NVM_RST
8765
4
3
2
1
IC3807
M24128-BWMN6T(A)
SD
!S1!
S2
VSS
SDA
SCL
TEST
VCC
16V
C3816 0.01
10V
0.1
C3810
10V
0.1
C3813
10V
0.1
C3800
10V
0.1
C3801
10V
0.1
C3814
10V
0.1
C3807
10V
0.1
C3804
10V
0.1
C3809
1k
R3827
1/16W
1k
R3801
1/16W
1k
R3839
1k
R3850
XX
R3847
0
R3832
R3851
XX
XX
C3803
100
R3803
100
R3820
100
R3806
100
R3821
100
R3816
100
R3844
100
R3843
100
R3819
100
R3817
100
R3831
100
R3826
100
R3810
100
R3828
100
R3835
XX
R3829
100
R3842
100
R3809
CHIP
2.2k
R3804
1/16W
10k
R3841
50V
470p
C3811
1/16W
470
R3846
+3V3D
+3V3D
+3V3D_81
+3V3D_81
D3801
D3803
D3804
D3805
XX
R3807
XX
R3805
XX
R3834
XX
R3808
XX
R3813
nCI_OVR
PPORT0
100
R3815
nFTV2005_SEL
PPORT42
FTV_CONFIG[0]
PPORT45
PPORT48
PPORT47
PPORT46
SPKRB
STSCHGB
VS2B
100
R3849
100
R3852
100
R3853
100
R3854
100
R3855
100
R3856
100
R3857
100
R3858
100
R3859
10k
R3848
R3892
10k
10k
R3840
10k
R3838
10k
R3837
10k
R3836
10k
R3825
10k
R3824
10k
R3822
+3V3D
+3V3D
nSMC_RST
100
R3814
+3V3D
+3V3D_81
+3V3D
100
R3860
100
R3830
XX
R3894
10k
R3896
D3806
GCSB2
GRDYB
+3V3D
10V
0.1
C3817
10V
0.1
C3812
+3V3D
1/16W
R3802
CHIP
100
1/16W
4.7k
R3861
+3V3D
XX
R3823
XX
R3833
10V
0.1
C3805
10V
0.1
C3806
10V
0.1
C3808
0uH
FB3802
0uH
FB3804
0uH
FB3800
0uH
FB3801
D3807
100
R3862
XX
R3898
2SA2029T2LQ/R
Q3808
2SC5658T2LQ/R
Q3806
54
3
2
1
TC7SH08FU(T5RSOYJF)
IC3806
A
B
GND
Y
Vcc
54
3
2
1
TC7SH08FU(T5RSOYJF)
IC3803
A
B
GND
Y
VCC
10k
R3899
+3V3D
XX
R3897
R3895
10k
R3893
XX
PPORT2
PPORT13
PPORT12
PPORT44
FTV_CONFIG[2]
FTV_CONFIG[0]
nFTV2005_SEL
FTV_CONFIG[1]
1/16W
22k
R3800
54
3
2
1
PST3629UL
IC3800
OUT
VCC
GND
NC
CD
1PS184-115
D3800
14
13
12
11
10
9
8
7
6
5
4
3
2
1
IC3805
74LVC08APW
1A
1B
1Y
2A
2B
2Y
GND
3Y
3A
3B
4Y
4A
4B
VDD
14
13
12
11
10
9
8
7
6
5
4
3
2
1
74LVC32A-PW
IC3804
1A
1B
1Y
2A
2B
2Y
GND
3Y
3A
3B
4Y
4A
4B
Vcc
RDATA[8]
RDATA[1]
nRESET
RDATA[3]
RDATA[0]
RDATA[9]
RDATA[4]
RDATA[13]
RDATA[5]
RDATA[15]
RDATA[7]
RDATA[14]
RDATA[2]
RDATA[11]
RDATA[12]
RDATA[10]
RDATA[6]
RADD[14]
nMASTER_RESET
nFE_RESET
QUAD AND GATE
THIS RESISTOR AND
CAPACITOR TO BE PLACED
CLOSE TO IC3801 AND IC3802
GP OUTPUT
RESET SIGNAL GENERATION
GP INPUT TO EMMA
EEPROM
CI_PWR_EN
MODEM_EN
CI_BYPASS
NVM_WE
PCCARD_EN
CI_EN
nSW_FE_RESET
NVM_RST
RDATA[12]
RDATA[6]
RDATA[1]
RDATA[11]
RDATA[10]
<- RDATA[15]
<- RDATA[13]
<- RDATA[7]
<- RDATA[3]
<- RDATA[14]
<- RDATA[5]
<- RDATA[4]
<- RDATA[2]
<- RDATA[8]
RDATA[9]
MOUNT ALL LEDS TOGETHER IN LINE
RDATA[0]
SW OPTION SELECT R’S
N
N.-AT2X
7/7
COMPONENTS MARKED AS XX ARE NOT FITTED ON THIS MODEL
IC3802
(SML-310MTT86)
Содержание Bravia KLV-V26A10E
Страница 16: ... 16 AT2X RM EA001 RM ED001 SECTION 2 DISASSEMBLY 2 2 BRACKET REMOVAL 2 1 REAR COVER REMOVAL ...
Страница 18: ... 18 AT2X RM EA001 RM ED001 2 5 G2 BOARD REMOVAL 2 6 H7 BOARD REMOVAL ...
Страница 19: ... 19 AT2X RM EA001 RM ED001 2 7 H8 BOARD REMOVAL 2 8 BL N and NP1 BOARD REMOVAL ...
Страница 20: ... 20 AT2X RM EA001 RM ED001 2 9 H6 BOARD REMOVAL ...