K850
1203-2528 rev. 1
APPENDIX
Components N2202 - N2203
A
P
P
E
NDIX
+
6
5
GND
OUT
LX
SC70
2.0mm x 2.1mm
TOP VIEW
4
1
2
3
IN
GND
SHDN
Pin Configurations
PWM
LOGIC
GND
LX
IN
SHDN
0.6V
OUT
Simplified Functional Diagram
Pin assignment in TFBGA 3x3 mm - 16 bumps 0.5 mm pitch
PGND
PVDD
MODE/
SYNC
FB1
VLX1
STATE
AUTO
FB2
VLX2
VSEL
VDD
VOUT1
VOUT2
GND
EN
A
B
C
D
1
2
3
4
T_MODE
PGND
PVDD
MODE /
SYNC
FB1
VLX1
STATE
AUTO
FB2
VLX2
VSEL
VDD
VOUT1
VOUT2
GND
EN
1
2
3
4
A
B
C
D
T_MODE
Top view
Bottom view
1
2
3
4
A
B
C
D
A
B
C
D
4
3
2
1
Pin description
n
o
i
t
p
i
r
c
s
e
D
l
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b
m
y
S
n
i
P
A1
PGND
Power ground
B1
PVDD
Power supply voltage
C1
MODE/SYNC
MODE/SYNC = High to forced PWM mode
MODE/SYNC = Low to forced PFM mode
MODE/SYNC = 600 kHz - 1.5 MHz external clock synchronization in PWM
D1
FB1
Feedback 1
A2
VLX1
External inductor connection pin 1
B2
STATE
Output STATE pin allow the user to monitor operation mode of the product
STATE = High - PFM mode
STATE = Low - PWM mode
If not used must be left unconnected.
C2
AUTO
PWM/PFM automatic switch control pin
AUTO = High - PWM/PFM mode automatic switch ENABLED
AUTO = Low - PWM/PFM mode automatic switch DISABLED
PWM/PFM mode controlled by MODE/SYNC pin)
D2
FB2
Feedback 2
A3
VLX2
External inductor connection pin 2
B3
T_MODE
Input signal for test mode selection. This pin must be connected to GND.
C3
VSEL
Voltage selection input
VSEL = High - VOUT1 = 1.8V, VOUT2 = 1.2V (valid for STA1)
VSEL = Low - VOUT1 = 1.8V, VOUT2 = 1.0V (valid for STA1)
(For other voltage options see
Table 1: STw4141 ordering information
)
D3
VDD
Signal supply voltage
A4
VOUT1
Output voltage 1
B4
VOUT2
Output voltage 2
C4
GND
Signal ground
D4
EN
Enable Input:
EN = Low - Device in shutdown mode,
EN = High - Enable device
This pin must be connected either to VDD or GND.
N2202 IC Voltage Regulator MAX8640, 1.8V 1200-6420
N2203 IC Voltage Regulator 1200-0110
SEMC Troubleshooting Manual
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