USER GUIDE
UG499: Si828x-AW-GDB Gate Driver Boards
Skyworks Solutions, Inc. • Phone [949] 231-3000 • [email protected] • www.skyworksinc.com
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November 10, 2022
4. Truth Table
Table 3 provides the truth table of the input to output signals under various operating conditions.
Table 3: Si828x-AW-GDB I/O Truth Table
HS-PWM LS-PWM
PWM-EN
2
PS-DIS
4
Reset_Input
3
Overcurrent
UVLO
FAULT
8
HS-Gate LS-Gate
Output
(HS-Source/LS-Drain)
L
L
H or Z
H or Z
L or Z
No
H
L
L
Z
L
H
H or Z
H or Z
L or Z
No
H
L
H
L
H
L
H or Z
H or Z
L or Z
No
H
H
L
H
H
H
H or Z
H or Z
L or Z
Yes
5
L
H
9
H
9
Z
9
X
X
L
6
H or Z
L or Z
No
H
L
L
L
X
X
X
L7
X
No
L
L
L
Z
X
X
H or Z
H or Z
L or Z
Yes
L
L
L
Z
9
Notes:
1. H = High | L = Low | X = Irrelevant | Z = High Impedance
2. PWM-EN is active high and has a pull up resistor on the input.
3. Reset_Input is active high and has a pull down resistor on the input.
4. PS-DIS\ is active low and has a pull up resistor on the input.
5. An Overcurrent condition is induced when both PWM inputs are high. This condition must be disallowed by external overlap protection.
6. A low on PWM-EN disables the outputs of the PWM receivers; they are pulled low by resistors in this case.
7. When PS-DIS\ is low, the gate driver output power supply is disabled. The HS-Gate and LS-Gate signals are pulled to their respective sources by resis-
tors.
8. The FAULT output is active low; it goes low when there is an overcurrent / UVLO fault or a driver IC indicates a non-READY state.
9. When an overcurrent condition is induced, the gate signals are pulled low and the output becomes high-impedance after the fault condition is indi-
cated by a driver chip.
