Si5317-EVB
2
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
Rev. 0.1 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • October 4, 2021
1. Functional Block Diagram
A functional block diagram of the EVB is shown in Figure 1. The Si5317-EVB provides alarm and status outputs,
programmable output clock signal format (LVPECL, LVDS, CML, CMOS), selectable loop bandwidths, and ultra
low jitter.
The Si5317 accepts a single clock input ranging from 1 MHz to 710 MHz and generates two equal frequency clock
outputs ranging from 1 to 710 MHz. The clock frequency range and loop bandwidth are selectable from a simple
look-up table. The Si5317-EVB has a differential clock input that is AC terminated to 50
and then AC-coupled to
the Si5317. The two clock outputs are AC-coupled. The XA-XB reference is usually a 114.285 MHz crystal; but
there are provisions for an external XA-XB reference (either differential or single-ended). The device status are
available on a ribbon header and LEDs. Control pins are strapped using jumper headers for device configuration
and various board options. The board can be powered using either external power supplies or from a PC's USB
port. Refer to the Si5317 data sheet for technical details of the device.
Figure 1. Si5317 EVB Block Diagram
Si5317
CKIN+
CKIN-
CKOUT1-
CKOUT2-
FRQTBL
FRQSEL[3:0]
BWSEL[1:0]
RATE[1:0]
SFOUT[1:0]
DBL2_BY
XA XB
INC
DEC
LOS
LOL
RST_B
2x5
JUMPER
HEADER
2x15
JUMPER
HEADER
L
E
D
Term*
Term*
Term*
Control
Status/
Control
VDD
GND
Header
USB
+ Regulator
DUT Power
3.3V
Term*
