Skanti TRP 5000, Инструкция по эксплуатации

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By activating the key S2, the output of pin 9 of SK1 will be forced LOW,
as for an un-programmed Frequency No., thus permitting the user via the
key S1 to activate IC and there by IC6 and IC8.
Their outputs are combined by means of 4/6 IC5, 2/4 IC7 and 1/4 IC3 into
three pulse-trains, one for the Vcc-pins and one for the Enable pins of
the three PROM’s and lastly one for the transistor TR1. This transistor
sinks the programming current from the PROM-output to which the
Programming Pin is connected.
The three pulse-trains are shown below.
The two voltage levels of the Vcc-pins of the PROM’s are stabilised by
means of D3 and IC9.
In order to keep the PROM’s as cool as possible, which is very essential
to obtain good programming re-suits, their Vcc supply line only receives
a 5V pulse in 5msec out of 100msec during the period of time where no
programming takes place. This pulsed operation is controlled by a clock-
pulse generated by IC1 openin,0 and closing, via 214 1G3 and 216 ICS,
the transistorTR2.
At the end of each 5msec period the logic levels of pin 9 of SK1 and the
Programming Pin are read into the two D-flipflops of IC4; a HIGH level,
corresponding to a programmed bit location will make the associated lamp
light.
When the key SK1 is activated and MON1 of IC2 is triggered, the clock
generator IC1 is stopped. Once the programming pulse-trains have been
accomplished the clock generator is allowed to start again after a delay
of approximately 30msec.
A delay circuit consisting of R71, R72, C12 and D4 prevents the Vcc -
programming pulse from being generated when the PROGRAMMING UNIT is
first switched on. This prevents false generated signals to IC2. This is
accomplished by turning off TR2 via 1/4 IC3 and 2/6 IC5 until all the
voltage levels have stabilised.
5 – 9