Si886xxISO-EVB
2
Rev. 0.1
1. Hardware Overview and Setup
The default configuration of the Si886xxISO-EVB demonstrates the digital isolation capabilities of the installed
Si88621ED-IS as well as its dc-dc converter performance. In this configuration, the dc-dc converter is enabled, the
primary side digital supply is sourced by an external regulator circuit, and the secondary side digital supply is
sourced by the output of the converter. This EVB configuration has a jumper installed at JP9 in the ON position,
JP13 has a jumper installed, and the remaining jumpers not populated.
Note:
Do not place jumpers across JP10 or JP11. These are additional test points for VDDA, GNDA and GNDB, and VOUT
respectively.
1.1. DC-DC Converter Input and Output
Supply power to the EVB by applying 24 Vdc to VIN at terminal block J1. LED D21 above terminal block J1
illuminates to show power applied to primary side of the converter.
The isolated dc-dc output, VOUT, is available at terminal block J2. The populated values for R5 and R6 produce a
5 V output at VOUT capable of sourcing up to 5 W to an external load connected to terminal block J2. LED D22
above the terminal block J2 illuminates when the dc-dc converter is operating.
VIN and VOUT test points are available along the upper edge of the EVB.
1.2. Digital Isolator Supplies
The A-side power is provided by a regulator circuit referenced to VREGA pin of the Si888621ED-IS. VIN is stepped
down from 24 V to approximately 4.3 V and applied to VDDA pin.
The B-side power is supplied by the output of the dc-dc converter through JP13.
1.3. Digital Signals
The EVB has a series of header pins for connecting to each digital channel. The inside conductor of each 2x1
header is connected to the device pin and the outer conductor is tied to ground through a resistor of 499
.
Connect digital signals to each side of the Si886xxISO-EVB through a two-row ribbon cable with one row
grounded.
Channel 1 transmits from A1 (JP1 pin 2) to B1 (JP4 pin 1).
Channel 2 transmits from B2 (JP5 pin 1) to A2 (JP2 pin 2).
Note:
The digital input signal should not exceed the power supply of the respective side.
1.4. Transformer Current Sensing
Primary side magnetizing current across the sense resistor R12, can be observed by probing TP20, RSNS with
reference to TP33, GNDP.
