Silicon Laboratories Si8410, Руководство пользователя, Страница: 15 / 38

Rev. 1.1 15
S i 8 4 1 0 / 2 0 / 2 1 ( 5 k V )
S i 8 4 2 2 / 2 3 ( 2 . 5 & 5 k V )
All Models
Output Rise Time t
r
C
L
= 15 pF — 2.0 4.0 ns
Output Fall Time t
f
C
L
= 15 pF — 2.0 4.0 ns
Peak Eye Diagram Jitter t
JIT(PK)
See Figure 6 — 350 — ps
Common Mode Transient
Immunity CMTI V
I
= V
DD
or 0 V 20 45 — kV/µs
Start-up Time
4
t
SU
— 15 40 µs
Table 4. Absolute Maximum Ratings
1
Parameter Symbol Min Typ Max Unit
Storage Temperature
2
T
STG
–65 — 150 C°
Operating Temperature T
A
–40 — 125 C°
Supply Voltage V
DD1
, V
DD2
–0.5 — 6.0 V
Input Voltage V
I
–0.5 — V
DD
+ 0.5 V
Output Voltage V
O
–0.5 — V
DD
+ 0.5 V
Output Current Drive Channel I
O
— — 10 mA
Lead Solder Temperature (10 s) — — 260 C°
Maximum Isolation Voltage (1 s) NB SOIC-8 — — 4500 V
RMS
Maximum Isolation Voltage (1 s) WB SOIC-16 — — 6500 V
RMS
Notes:
1. Permanent device damage may occur if the above absolute maximum ratings are exceeded. Functional operation
should be restricted to conditions as specified in the operational sections of this data sheet.
2. VDE certifies storage temperature from –40 to 150 °C.
Table 3. Electrical Characteristics
1
(Continued)
(V
DD1
= 2.70 V, V
DD2
= 2.70 V, T
A
= –40 to 125 °C)
Parameter Symbol Test Condition Min Typ Max Unit
Notes:
1. Specifications in this table are also valid at VDD1 = 2.6 V and VDD2 = 2.6 V when the operating temperature range is
constrained to T
A
= 0 to 85 °C.
2. The nominal output impedance of an isolator driver channel is approximately 50

, ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
3. t
PSK(P-P)
is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
4. Start-up time is the time period from the application of power to valid data at the output.