Siemens SMP16-CPU06 Series, Руководство пользователя

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SMP16-CPU06x Initial Commissioning
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3.3 Switching from SMP16-CPU055 to SMP16-CPU065
Keep the following points in mind when switching from an SMP16-CPU055 to an SMP16-CPU065 in
an existing SMP16 system.
•
The SMP16-CPU065can be installed directly in the slot of the SMP16-CPU055.
•
The IPCI bus plug connector must at least be powered with the PS adapter (only 5 V required).
•
When an IPCI backplane and IPCI cards are used, the backplane must be wired. Remember that
the 3.3 volts from the SMP16-CPU065 are not available to the IPCI bus.
•
The VIO (reference voltage for the signal level on the IPCI bus) must be set to 3.3 V. All IPCI I/O
boards must use the VIO of the backplane bus.
•
When an IPCI backplane with HD/FD-UNI-I/O wiring is used, one slot should be left free on the
left side to leave room for the new design (new drive insert).
The table below shows the differences between the SMP16-CPU065 and the
SMP16 CPU055
Function SMP16-CPU055 SMP16-CPU065
3.3 volt power supply Required from external source. Feed
in over PS adapter or IPCI
backplane. On board
SMP16 register can be
read back. No All registers can be read back in the area
0178h to 017Fh.
Starting with KS02:
Area 0138h to 013Ch
SMP16 bus interface
can be switched off. No Set R178 bit 7 = 1.
(Also switch off SYSCLK/OSC)
Switch off clock pulses
on the SMP16 bus
(8.33 MHz and
14.318 MHz) No Set R178 bit 6 = 1.
(Bit 7 = 0 required)
Starting with KS02:
R13B bit 6, 7 - single enable
possible
Watchdog can be read
back. No R17E bit 7 = 1 after restart (no power on)
indicates that a watchdog reset took place.
Writing R17E bit 7 = 1 deletes the bit.
Watchdog time can be
set. Two times (approx. 100 msec, 1 sec) Adjustable between 96 msec and 960 msec
R17E Bit 3,4,5
Additional counter block No Access via R134-R137
R17C Bit 3, 4 Input clock pulse counter,
ZZ0 and ZZ1 can be set.
Bit 4 Cascading of
counters ZZ0 and ZZ1
possible
R17C Bit 2 Counter enable
Starting with KS02:
R13B Bits 0,1,2 Clock pulses can be
enabled separately.
Bits 3, 4, 5 Gates can be addressed
separately.
R13C Bits 0,1,2 Clock pulses can be
addressed with DI.
Bits 4,5,6 Gates can be addressed
with DI.