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Technical Data

SMP16-CPU06x

©Siemens AG 2001, All Rights Reserved

12

(4)J31069-D2085-U001-A2-7618

•

16 digital inputs/outputs

2 10-pin socket strips, AMP Micro Match,

parameterizable, TTL level

•

SMP16-CPU065
- IPCI bus

180-pin socket strip
Allocated in acc. w. IPCI bus spec. V1.51, July 1998
UNI-IO allocation for hard disk interface (secondary
channel) and
floppy disk interface (drive B)

•

SMP16-CPU066:
- CPCI bus

220-pin socket strip
Allocated in acc. w. CPCI spec. PICMG 2.0 R3.0
RPIO allocation for hard disk interface (secondary
channel) and
floppy disk interface (drive B)

AGP option

Monitor screen controller

Silicon Motion LYNX E/EM

Video memory (SG-RAM)

4 Mbytes

Monitor screen resolution supported

1024 x 768/16.7 million colors at 75 Hz

Connections

•

Analog monitor screen/

Socket, 15-pin, high density

LVDS display

Can be switched for display
Resolution: 640x480 / 800x600 / 1024x768

•

PanelLink display

Socket, 26-pin HDP
Resolution: 640x480 / 800x600 / 1024x768

•

USB

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Содержание SMP16-CPU06 Series

Страница 1: ...P Industrial Microcomputer 4 J31069 D2085 U001 A2 7618 Technical Description Order No 6AR1930 0AA07 2CA0 February 2001 SMP16 CPU06x SMP16 CPU065 SMP16 CPU066 SMP16 AT CPU Boards with Pentium II III Processor ...

Страница 2: ... g NMI Notes SICOMP is a registered brand of Siemens AG IBM AT and IBM PC are registered brands of International Business Machines Corp INTEL is a registered brand of INTEL Corp MS DOS Windows and Windows NT are registered brands of Microsoft All other designations in this documentation may be brands whose use by third parties for their own purposes may violate the rights of the owner Passing on a...

Страница 3: ...ctions or circuit board conductors when handling the boards Never allow boards or components to touch chargeable objects plastics Never place components or boards in the vicinity of cathode ray tube units or television sets minimum distance 10 cm Leave the boards in their special packaging until you are ready to use them Do not take the boards out of their packaging or touch them when registering ...

Страница 4: ...SMP16 CPU06x Siemens AG 2001 All Rights Reserved 4 4 J31069 D2085 U001 A2 7618 ...

Страница 5: ... Chip Set 27 4 3 1 Power Management 27 4 3 2 System Management Bus 27 4 3 3 Counters and Timers 27 4 3 4 DMA Controller 28 4 3 5 Interrupt Controller 28 4 3 6 NMI Generation 31 4 3 7 Bus Timing 32 4 3 8 Addressing the Loudspeaker 32 4 4 Drive Controller 33 4 5 LAN Controller 34 4 6 VGA Graphics Expansion 34 4 7 Realtime Functions 41 4 7 1 Additional Counter Timer Block 41 4 7 2 Additional Interrup...

Страница 6: ...16 CPU066 67 5 2 3 Signals of the Hard Disk Interface 40 Pin 68 5 2 4 Signals of the Hard Disk Interface 44 Pin 69 5 2 5 Signals of the Floppy Disk Interface 34 Pin 70 5 3 Front Plate Interfaces 71 5 3 1 USB Bus Interfaces 71 5 3 2 Signals of the Keyboard Interface 71 5 3 3 Signals of the Serial Interfaces COM A COM B 72 5 3 4 Signals of the LAN Interface RJ45 72 5 3 5 Parallel Interface LPT1 73 5...

Страница 7: ... IMC Miscellaneous 133 9 1 11 Setup Page Password Setting 135 9 1 12 Setup Page IDE HDD Auto Detection 135 9 1 13 Setup Page Save Exit Setup 136 9 1 14 Setup Page Exit Without Saving 137 9 1 15 Setup Default Setting 138 9 2 LAN Boot BIOS 141 9 3 BIOS Flash Memory 142 9 4 ROM BIOS Interrupts 143 9 5 BIOS Data Area 145 10 BIOS Update 148 10 1 System BIOS 148 10 2 The AWDFLASH EXE Service Program 148...

Страница 8: ...EPROM 176 11 4 4 Use of the Buffered SRAM 178 11 4 5 Description of test program TEST6x 386 192 12 Appendix 193 12 1 Notes on the Different Operating Systems 193 12 1 1 Windows NT 193 12 1 2 Win9x 193 12 1 3 RMOS 193 12 2 Layout of the CMOS RAM and the CDT 194 12 3 Use of the CDT during BIOS Startup 195 12 4 POST Codes 196 12 5 View of the Front Plate of the SMP16 CPU06x 198 12 6 Abbreviations and...

Страница 9: ...Another difference is the decoupling of the secondary EIDE channel and floppy via the I CPCI backplane With the CPCI backplane the signals for the secondary EIDE channel and the floppy disk drives are assigned to the area for the rear panel I O An adapter is required to decouple these signals see chapter 4 14 Use of the SMP16 CPU065 varies depending on the specific models of the individual boards ...

Страница 10: ...Introduction SMP16 CPU06x Siemens AG 2001 All Rights Reserved 10 4 J31069 D2085 U001 A2 7618 ...

Страница 11: ...herwise via battery on system rack Network AMD 79C793 10 100 MBaud network controller Automatic 10BaseT 100BaseT2 switchover Realtime expansions Interrupt system Interrupt controller 82C59A Five inputs accessible by SMP16 bus Five inputs accessible by SMP16 bus Counter timer Timer 82C54 Outputs connected to interrupts Gate and clock pulse inputs configurable Connections PS 2 mouse keyboard connect...

Страница 12: ...rive B SMP16 CPU066 CPCI bus 220 pin socket strip Allocated in acc w CPCI spec PICMG 2 0 R3 0 RPIO allocation for hard disk interface secondary channel and floppy disk interface drive B AGP option Monitor screen controller Silicon Motion LYNX E EM Video memory SG RAM 4 Mbytes Monitor screen resolution supported 1024 x 768 16 7 million colors at 75 Hz Connections Analog monitor screen Socket 15 pin...

Страница 13: ...ation 30 g half sine 11 msec pos and neg direction 3 shocks per axis In acc w DIN EN 60068 2 27 Test Ea Storage 25 g half sine 6 msec pos and neg direction 1000 shocks per axis In acc w DIN EN 60068 2 29 Test Eb Electromagnetic compatibility Generic standard EMC for industry In acc w EN50081 2 1993 EN50082 2 1995 Dimensions width depth height 40 60 mm 180 mm 130 mm Weight Approx 1 5 kg with AGP op...

Страница 14: ...Technical Data SMP16 CPU06x Siemens AG 2001 All Rights Reserved 14 4 J31069 D2085 U001 A2 7618 ...

Страница 15: ...085 U001 A2 7618 15 3 Initial Commissioning The flowcharts on the next few pages illustrate the procedure recommended for initial commissioning of the board Layout and special wiring of the bus backplane BIOS settings see chapter 6 2 Settings on the hardware End Initial commissioning ...

Страница 16: ...ardware Delete BIOS settings on CMOS RAM Close switch S1 2 ON wait 30 seconds and then return it to OFF position Since the Setup settings are also stored on the CDT in flash and these are still valid pin 2 and pin 12 must be connected on the LPT plug connector the next time the system is started so that both the CMOS content and CDT are invalid End ...

Страница 17: ...us backplane SMP16 or IPCI End Layout and special wiring of the bus backplane SMP16 CPU065 Wire power supply on SMP16 bus backplane Install SMP16 CPU065 CPU board and mass storage insert for IPCI system in the system rack Install and wire IPCI bus backplane Set V I O to 3 3 V Connect SMP16 CPU065 CPU board to mass storage insert for SMP16 system and install both together in the system rack Yes Use...

Страница 18: ... backup battery to bus backplane SMP16 or IPCI End Layout and special wiring of the bus backplane SMP16 CPU066 Wire power supply on SMP16 bus backplane Install and wire IPCI bus backplane Set V I O to 3 3 V Connect SMP16 CPU065 CPU board to mass storage insert for SMP16 system and install both together in the system rack Yes Use PS adapter 5 V only No Operation with IPCI backplane PS 330 1 in syst...

Страница 19: ...unction SMP16 CPU055 SMP16 CPU065 3 3 volt power supply Required from external source Feed in over PS adapter or IPCI backplane On board SMP16 register can be read back No All registers can be read back in the area 0178h to 017Fh Starting with KS02 Area 0138h to 013Ch SMP16 bus interface can be switched off No Set R178 bit 7 1 Also switch off SYSCLK OSC Switch off clock pulses on the SMP16 bus 8 3...

Страница 20: ...put R138 9 Data ports R13A Control regis ter Port 0 can also be set as clock pulse and gate inputs of the additional counter R13C Parameterization Serial EEPROM Access via GPP2 of the FDC37C932 0EAh 0EBh bits 0 to 2 DI DO CLK Access via GPP2 of the PIIX4E R4035 Bit 2 Clock pulse for ser EEPROM GPO10 R4035 Bit 1 Data for ser EEPROM GPO9 R4032 Bit 1 Data from ser EEPROM GPI17 USER LED Two LEDs can b...

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