5-43
System Manual
C79000-G8576-C199-07
You require a user memory submodule (RAM or EPROM) for storage of your
program. You can store up to 64 x 2
10
bytes of code and data blocks here. For
data blocks, the CPU 928B additionally has an integrated DB RAM of
46 x 2
10
bytes.
A description of the memory submodules can be found in Sections 5.9 and
5.10; order numbers are given in the ordering information.
There are two independent interfaces on the front of the CPU 928B.
You can connect programmers and OPs to the first interface. This
PG interface SI1 is permanently installed on the CPU.
You can use PG interface SI1 either via the front connector of the CPU 928B
or via the front connector of the 923C coordinator module.
Note
Simultaneous operation of PG interface SI1 via the front connector of the
CPU 928B and of the coordinator is not possible. Electrically, it is merely a
PG interface which can be operated via two different terminals. Switching
the programmer online without a job request is already sufficient to operate
the interface. If you wish to utilize a second PG interface for connection of a
PG or OP, the connection must be made via the second PG interface with the
PG submodule.
Apart from PG interface SI1, the second interface SI2 can also be used as a
PG interface in parallel with the first one. You can only use the second
PG interface via the front connector of the PG submodule on the CPU 928B.
A detailed description of operations with the two PG interfaces can be found
in the CPU 928B Programming Guide.
The connection to the PG can be established with the CPU in any operational
state.
User Memory
PG Interface SI1
CPUs, Memory Cards, Memory Submodules, Interface Submodules
