Minimum
Typical
Maximum
EDM input
Input resistance at HIGH
2 kΩ
Voltage for HIGH
11 V
24 V
28.8 V
Voltage for LOW
–3 V
0 V
5 V
Input capacitance
15 nF
Static input current
6 mA
15 mA
Response time at EDM after switching on the
OSSDs
300 ms
Static control inputs
Input resistance at HIGH
2 kΩ
Voltage for HIGH
11 V
24 V
28.8 V
Voltage for LOW
–3 V
0 V
5 V
Input capacitance
15 nF
Static input current
6 mA
15 mA
Input frequency (max. switching sequence or fre‐
quency)
1/t
UFVz
+ half basic response time
(t
UFVz
= time set for advancing the timing
for the switching)
Dynamic control inputs
Input resistance at HIGH
2 kΩ
Voltage for HIGH
11 V
24 V
28.8 V
Voltage for LOW
–3 V
0 V
5 V
Input capacitance
1 nF
Static input current
6 mA
15 mA
Duty cycle (Ti/T)
0.5
Input frequency
100 kHz
Voltage supply for incremental encoders
24 V voltage output HIGH
U
V
– 3 V
U
V
Current load
50 mA
100 mA
OSSDs
Output signal switching device pair
2 PNP semiconductors, short-circuit pro‐
tected
7)
, cross-circuit monitored
Safe status when a fault occurs
At least one OSSD is in the OFF state.
Switching voltage HIGH at 500 mA
U
V
– 2.7 V
U
V
Switching voltage LOW
0 V
0 V
3.5 V
Source switching current
6 mA
0.2 A
0.5 A
Leakage current
8)
250 µA
Load inductance
9)
2.2 H
Load capacity
2.2 µF at
50 Ω
Switching sequence (no toggling and no simulta‐
neous monitoring)
Depending on the load inductance
Permissible cable resistance
10)
2.5 Ω
Test pulse width
11)
230 µs
300 µs
Test frequency
At 0.5° angular resolution
120 ms
12
TECHNICAL DATA
142
O P E R A T I N G I N S T R U C T I O N S | S3000
8009942/ZA18/2019-11-14 | SICK
Subject to change without notice
