HOT- 565 User's Manual 25
Video BIOS Cacheable
This item allows the user to set the video BIOS C000~C7FF areas that are
cacheable or non-cacheable.
8 Bit I/O Recovery Time
The recovery time is the length of time, measured in CPU clocks, that the
system will delay after the completion of an input/output request. This
delay takes place because the CPU is operating more than the input/output
bus that the CPU must be delayed to allow for the completion of the I/O.
This item allows you to determine the recovery time allowed for 8 bit I/O.
Choices are from NA, 1 to 8 CPU clocks.
16-Bit I/O Recovery Time
This item allows you to determine the recovery time allowed for 16 bit I/O.
Choices are from NA, 1 to 4 CPU clocks.
Memory Hole At 15M-16M
In order to improve performance, some space in memory can be reserved for
ISA cards. This memory must be mapped into the memory space below 16
MB.
PCI 2.1 Compliance
Since the 2.1 revision of the PCI specification requires much tighter
controls on target and master latency. PCI cycles to or from ISA typically
take longer. When enabled, the chipset provides a programmable delayed
completion mechanism to meet the required target latencies.