Sharp Wizard OZ-770PC, Руководство по обслуживанию

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2-3. LCD Driver (JT6J15-AS) : COB (Bare Chip) is
used
The JT6J15-AS is an 80-channel-output row driver for an STN dot
matrix LCD. The JT6J15-AS features 28V-LCD drive voltage. The
JT6J15-AS is able to drive LCD panels with a duty ratio of up to
1/160.
1) Features
•
Display duty application: to 1/160
•
LCD drive signal: 80
•
Data transfer: Two different styles of 1-bit bi-direc-
tional can be selected
COM 80 COM 1
COM 80 COM 1
•
LCD drive voltage: 11 to 28 V (maximum drive voltage
= 30 V)
•
Operating voltage: 2.7 to 5.5 V
•
Operating temperature: –20 to 75°C
•
LCD drive output resistance: 1.5 k
Ω
(max)
(Vo = 12.8 V, 1/7 to 1/14 bias)
•
Display-off function: When /DSPOF is L, all LCD drive
outputs (O1 to O80) remain at the
V
SS
/V5 level.
•
LCD drive output timing: Change on falling edge or rising
edge of LP (selected by TSW)
2-4. DC-DC conector (XC 6372A)
1) Pin Assignment
2) Pin Description
XC6372A
PIN NUMBER
PIN NAME FUNCTION
XC6372A
1 V
SS
GND
2 V
OUT
Output voltage monitor /
IC internal power supply
3 L
X
Switch
— EXT External switch transistor drive
3) Block Diagram
XC6372A
V
DD
is internally connected to the V
OUT
pin.
2-5. Static RAM
1) OUTLINE
The TC551001CP is a 131,072-word x 8-bit, 5-V driven asynchronous
high-speed CMOS static RAM. The power consumption is 5mA/MHz
(standard) in operation and the access time is a maximum of 5ns;
that is, the use of a new circuit has turned high speed and low power
consumption into reality. In addition, the power consumption is only
1
µ
A in standby state and data can be backed up by the battery.
2) Features
•
Low power consumption: 27.5 mW/MHz (standard) in operation
•
5-V power supply: 5V 10%
•
Data retaining power supply voltage: 2V ~ 5.5V
•
Output buffer control: OE
•
I/O complete TTL compatible
•
Standby current (max):
TC551001CP/CF/CFT/CTR/CST/CSR
–55, –70, –85 –55L, –70L, –85L
5.5V 100
µ
A 20
µ
A
3.0V 50
µ
A 10
µ
A
•
Access time (max)
TC551001CP/CF/CFT/CTR/CST/CSR
–55, –55L –70, –70L –85, –85L
Access time 55ns 70ns 85ns
CE1 access time 55ns 70ns 85ns
CE2 access time 55ns 70ns 85ns
OE access time 30ns 35ns 45ns
•
Package
TSOP I 32-P-0820-0.50 (CFT) (Mass:0.34 standard)
3) Pin configurations
•
32 pin TSOP
(Normal bend type)
4) Pin names
A0 ~ A16 Address input
R/W Read/write input
OE Output enable input
CE1, CE2 Chip enable input
I/O1 ~ I/O8 Data I/O
V
DD
Power supply terminal (+5V)
GND Ground
N.C. Not used
3 2 1
SOT-89-3
(TOP VIEW)
Lx
VSS
EXT
CE
Vout
Buffer
Slow Start
Vref
PWM como
PWM Controlled
OSC
50/100/180khZ
VDD
Chip Enable
VLx Limiter
1 16
32 17
(TOP VIEW)
(Normal bend type)