Sharp SD-AS10, Руководство по обслуживанию

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SD-AS10
8 – 11
ICA100, ICA200, ICA300 RH-iX0498AWZZ: 7th Order Modulation Conversion LSI (IX0498AW)
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Pin No. Terminal Name Input/Output Function
1 VDDL Input Power supply terminal of Channel L digital output section.
2 OUTL(+) Output Channel L normal rotation output terminal.
3 OUTL(-) Output Channel L inversion output terminal.
4 GNDD — Ground terminal of the digital output section.
5 OUTR(-) Output Channel R inversion output terminal.
6 OUTR(+) Output Channel R normal rotation output terminal.
7 VDDR Input Power supply terminal of Channel R digital output section.
8 VDDX Input Power supply terminal of the oscillating section.
9 XI Input Crystal oscillator connection terminal. Generates clock necessary for the system.
10 XO Output Crystal oscillator connection terminal. Generates clock necessary for the system.
11 GNDX — Oscillating section ground terminal.
12* MCK Output System clock output terminal.
13* TEST Input Test terminal. Normally used in “L”.
14 NFR1(+) Input Normal rotation signal feedback input terminal of Channel L.
15 NFR2(-) Input Inversion signal feedback input terminal of Channel L.
16 GNDA — Analog ground terminal for AD converter.
17 RCH IN Input Channel R analog input terminal.
18 RCH VREF Input Channel R reference voltage terminal.
19 LCH VREF Input Channel L reference voltage terminal.
20 LCH IN Input Channel L analog input terminal.
21 RESET Input Reset terminal. Reset with “L”.
22 NFL2(-) Input Inversion signal feedback input terminal of Channel L.
23 NFL1(+) Input Normal rotation signal feedback input terminal of Channel L.
24 VDDA Input Analog power supply terminal for AD converter.
1
2
3
4
5
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7
8
9
10
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12
24
23
22
21
20
19
18
17
16
15
14
13
VDDL VDDA
NFL1(+)
NFL2(-)
RESET
Lch IN
Lch Vref
Rch Vref
Rch IN
GNDA
NFR2(-)
NFR1(+)
TEST
OUTL(+)
OUTL(-)
GNDD
OUTR(-)
OUTR(+)
VDDR
VDDX
XI
XO
GNDX
MCK
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VDA NFL1(+) NFL2(-) RESET Lch
IN
Lch
Vref
Rch
Vref
Rch
IN
GNDA NFR2(-) NFR1(+) TEST
VDDL
OUTL(+)
OUTL(-)
GNDD
OUTR(-)
OUTR(+)
VDDR
VDDX
XI
XO
GNDX
MCK
Rch 7th order
∆Σ
Modulation Circuit
Rch 7th order
∆Σ
Modulation Circuit
Comparator Comparator
Amplitude Doubling
Converter
Amplitude Doubling
Converter
Oscillator
Figure 8-11 BLOCK DIAGRAM OF IC