Sharp LC52SB55U - LC - 52" LCD TV, Руководство по обслуживанию

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LC-52SB55U
7 – 1
LC-52SB55U
Service Manual
CHAPTER 7.
MAJOR IC INFORMATIONS
[1] MAJOR IC INFORMATIONS
1. MAJOR IC INFORMATIONS
1.1. IC1403 (VHiAK4682AE-1Y)
This IC provides for 2-channel A/D and 4-channel D/A (192-kHz sampling).
The analog audio signal from INPUT-1/2/3 or INPUT-4 (PC-IN audio) or INPUT-6 (HDMI-analog audio) input terminal is fed into this IC for selection.
The selected signal flows through A/D-unit into the video signal processing circuit IC8001 (iXC376WJQZ).
The digital audio signal (I2S) from IC8001 flows into AUDIO OUTPUT terminal via each D/A-unit.
1.2. IC1604, IC1804 (VHiBU16028K-1Q)
This IC is 3 to 1 Switch (Multiplexer) of DVI or HDMI input sources, supports 2.25Gbps signaling rate for 480i/p, 720i/p, and 1080i/p resolution to 12bit
color depth.
The DDC buffer and the Equalizer circuits to adapt long cable are integrated in this IC.
This IC has 5V Tolerance to all DDC and HPD_SINK inputs.
On this IC, the INPUT-5, 6, 7, 8 HDMI port are switched.
1.3. IC2002 (RH-iXC331WJN8Q)
The monitor microprocessor is intended to communicate with the main microprocessor and to operate the system.
It also controls power of the entire system.
1.4. IC2701 (VHiYDA147SZ-1Y)
The Class-D type digital audio power amplifier YDA147SZ gives maximum continuous output of 15 W/ch.
1.5. IC8001 (RH-iXC376WJQZQ)
This LSI is FULL HIGH-DEFINITION 1080P DIGITAL TV SYSTEM-ON-A-CHIP.
It combines a cable/terrestrial 4/1024-QAM and 8/16-VSB receiver, a transport processor, a digital audio processor, a high definition (HD) MPEG
video decoder, 2D graphics processing, digital processing of analog video and audio, analog video digitizer and DAC functions, stereo high-fidelity
audio DACs, two HDMI receivers for 1080p 60 inputs, a 330-MHz millions of instructions per second (MIPS) processor, and a peripheral control unit
providing a variety of television control functions.
The cable/terrestrial receiver directly samples a tuner output with an analog-to-digital converter (ADC).
The LSI digitally resample and demodulates the signal with recovered clock and carrier timing, filters and equalizes the data, and passes soft deci-
sions to an ATSC A/53 and ITU-T J.83 Annex A/B/C-compatible decoder.
It has an MPEG-2 Digital Video Broadcasting (DVB)-compliant transport processor with advanced section filtering capability, DVB descrambler, and
an MPEG-2 (MP@HL profile) video decoder.
Audio support includes a BTSC and a Dolby AC3/MPEG-2 Layer 1, 2, audio decoder.
The LSI provides analog and digital audio/video outputs.
A SPDIF output and a pair of analog outputs (L-R) are provided via the integrated audio DACs.
The NTSC analog video decoder is supported by its own motion adaptive deinterlacing and 3D comb filtering, including 1080i deinterlacing.
The LSI includes advanced 2D graphics processing.
Two transport stream inputs are included.
The LSI incorporates a complete MIPS32(r)-based microprocessor subsystem including caches with bridging to memory and a local bus, where
external peripherals can be attached.
Integrated peripherals include two USB 2.0, three UARTs, counter/timers and GPIO controllers.