Sharp LC-32LE240E, Руководство по обслуживанию

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LC-32LE240
LC-40LE240
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Pinning Table
and Application Block Diagram of Tuner---
2. AUDIO AMPLIFIER STAGE WITH AZAD2102(U163, U164)
2.1. General Description
17MB62 uses two 2,5W Class D Mono Audio Amplifers for from 16” to 24” TVs.
AZAD2102B is a 2.9 Watts (max. can offer 3.0 Watts @ Load = 3Ω,THD=10%,
AVdd=DVdd=5.5Volt)with high efficiency filter-free class-D audio power amplifier in a
1613 mm x 1613 mm wafer chip scale package (WCSP). AZAD2102B uses Current-
switch technology to achieve high performance class-d amplifier that features 0.03%
THD, 85% efficiency, –70 dB PSRR, to improve RF-rectification immunity.
AZAD2102B provide a Vibration-Spectrum modulation clock for PWM Output. This
vibration frequency is around 10KHZ shift (+/- 5KHZ of Fpwm).
The advantage of the small size package (WCSP) makes AZAD2102B very suitable for
mobile phone and PDA device application. And the Class-D amplifier structure let
AZAD2102B to have highly efficiency power consumption than Class-AB amplifier.
AZAD2102B can shrink the application board, reduce system cost, and external
components.
ESD level protection I/O embedded in AZAD2102B. For general applications, doesn’t
need to add extra ESD protection device (like Varistors) in application system for
AZAD2102B’s I/O.
2.2. Features
 CMOS Technology
 High Efficiency 85%
 High PSRR 70dB at 217Hz
 Differential OP-amp Input
 AZAD2102B provides Vibration-Spectrum Modulation clock for reduce EMI
 Provide Mute function(set Mute_B to GND will go into Mute status)
 For the input stage AZAD2102B built-in a 10Kohm resistors (Gain setting=29.5dB)
 Maximum Battery Life and Minimum Heat
 Efficiency With an 8-Ω Speaker:
 3.5 mA Quiescent Current
 Output Power at 10% THD
 2.85Watts at AVdd=DVdd=5.0Volt, Rload=4Ω
 1.45Watts at AVdd=DVdd=3.6Volt, Rload=4Ω
 0.30Watts at AVdd=DVdd=3.0Volt, Rload=4Ω
 1.75Watts at AVdd=DVdd=5.5Volt, Rload=8Ω
 0.87Watts at AVdd=DVdd=3.6Volt, Rload=8Ω
 0.41Watts at AVdd=DVdd=3.0Volt, Rload=8Ω
 Eliminate Power on and Power-off “Pop” noise
 A Fewer External Components
 Optimized PWM Output Stage Eliminates LC Output Filter
 Internally generate 290 kHz Switching Frequency to eliminate Capacitor and
Resistor
 Improve PSRR (–70 dB) and Wide Supply Voltage (3.0 V to 5.5 V)
 Fully Differential Design Reduces RF Rectification
 This chip has been built-in a very strong ESD protection.
 System level ESD 4KV (IEC 61000-4-2 ESD Contact Level)
 Wafer Chip Scale Package (WCSP)
 TSSOP Package with Exposed Pad