HT-CN410DVH
44
IC952, SMPS Controller (KA7500C)
Internal Block Diagram:
Figure 5: KA7500C BLOCK DIAGRAM
IC209, Octal D-Type Flip-Flop (74HC/HCT374)
Pin Description:
6
5
4
1
2
16
15
3
7
14
12
10
11
9
8
13
1
2
+
_
+
_
D
CK
Q
Q
C1
E1
C2
E2
V
CC
GND
5V
EA (+)
EA (-)
EA (+)
EA (-)
1.2V
BAND GAP
REFERENCE
V
REF
OUTPUT CONTROL
OSCILLATOR
R
T
C
T
DEAD
TIME
CONTROL
COMP INPUT
0.7MA
PWM
COMP
PIN NO.
SYMBOL
NAME AND FUNCTION
1
OE
3-state output enable input (active LOW)
2, 5, 6, 9, 12, 15, 16, 19
Q
0
to Q
7
3-state flip-flop outputs
3, 4, 7, 8, 13, 14, 17, 18
D
0
to D
7
data inputs
10
GND
ground (0 V)
11
CP
clock input (LOW-to-HIGH, edge-triggered)
20
V
CC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
OE
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
D0
D1
Q1
Q2
Q3
GND
D2
D3
Q7
VCC
D7
D6
Q6
Q5
Q4
CP
D5
D4
7Z90965
D0
D1
D2
D3
D4
D5
D6
D7
r
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
OE
7Z90966
7Z90967.1
3
2
4
7
8
13
14
17
18
5
6
7
3
1D
C1
2
4
7
8
13
14
17
18
5
6
9
12
15
16
19
12
15
16
19
11
EN
1D
C1
EN
1
11
374
Содержание HT-CN410DVH
Страница 30: ...HT CN410DVH 30 MEMO ...
Страница 82: ...HT CN410DVH 15 MEMO ...
Страница 83: ...HT CN410DVH 16 MEMO ...