Sharp Aquos LC-46X20E, Руководство по обслуживанию

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LC-42XL2E/S/RU, LC-46XL2E/S/RU, LC-46X20E/S/RU, LC-52XL2E/S/RU, LC-52X20E/S/RU
4 – 10
No picture on the display (3)
Does not the picture come out when DTV is received?
TERMINAL UNIT:
Is the voltage of regulation for a TUNER circuit and the power
supply terminal of IC7507 (COFDM) supplied?
(Refer to the circuit diagram)
NO Each power supply circuit is checked.
YES
Is IF signal output from pin (20), (21) of TUNER (TU7501) to pin
(30), (30) of IC7507 (COFDM)? NO Check the tuner, IC7507 and their peripheral circuits.
Replace as required.
TERMINAL UNIT: YES
Similarly, is communication control carried out between pin
(14),(15) of TU7501, and pin (4), (5)of IC7507? NO
YES
Does X7502 (20.48MHz) oscillate? NO Check X7502 and its peripheral circuits.
YES
Is MPEG data (FECLK, FED_D, FESTR_PSYNC, FEVAL_DEN)
from IC7507 are output to pin (1)/FECLK, (3)/FED_D of a con-
nector (P7501) and pin (51)/FESTR_PSYNC, (50)/FEVAL_DEN
of a connector (SC501)? NO Is the control signal named IC7507 and IC9101 (CPLD) normal?
(FE_RST_LINE, FEERR_LINE, FEPG0_COMP_LINE,
FEPG1_LOCK_LINE, etc.)
MAIN UNIT: YES
Is the digital signal input into pin (1)/FECLK, (3)/FED_D of a con-
nector (P1103) and pin (51)/FESTR_PSYNC, (50)/FEVAL_DEN
of a connector (SC1101)? NO Connector SC501/SC1101 and P7501/P1103 are checked.
YES
Is the digital signal input into pin (AF3)/FECLK, (AF2)/ FED_D,
(AF4)/FESTR_PSYNC, (AH3)/FEVAL_DEN of IC8101 (CPU/
DECODER)? NO Check the line between SC1101,P1103 and IC8101.
YES
Do X8101 (24.00MHz)/ X8102 (32.768kMHz) oscillate? NO Check the X8101/ X8102 and their peripheral circuits.
YES
Are video signal VDB_R [0:9], VDB_G [0:9], VDB_B [0:9], and
VBD_CLK/DE/HD/VD are output from IC8101 to IC3301 (VIDEO
PROCESSOR)? NO Check IC8101, IC3301 and their peripheral circuits.
(IC8301-IC8304 (DDR2_SDRAM), etc.)
YES
Refer to “The picture doesn't appear in all modes.”