Sharp AQUOS LC-37AD1E, Руководство по обслуживанию

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76
76-1
76-2
LC-37AD1E
Ë
IC4701(RH-IXA332WJZZQ)
QS DRIVE(EVEN)IC
»
Pin Function
Pin No.
Pin Name
I/O
Pin Function
1
GND
GND
2
TMS
BOUNDARY SCAN TEST PORT
3
HSIN
HORIZONTAL SYNC SIGNAL INPUT
4
VSIN
VERTICAL SYNC SIGNAL INPUT
5
DEIN
DE (DATA ENABLE) INPUT
6
REMS7
EVEN R7 INPUT
7
REMS6
EVEN R6 INPUT
8
REMS5
EVEN R5 INPUT
9
REMS4
EVEN R4 INPUT
10
REMS3
EVEN R3 INPUT
11
GND
GND
12
VCCO
3.3 V INPUT
13
VCCINT
2.5 V INPUT
14
REMS2
EVEN R2 INPUT
15
REMS1
EVEN R1 INPUT
16
REMS0
EVEN R0 INPUT
17
GEMS7
EVEN G7 INPUT
18
GEMS6
EVEN G6 INPUT
19
GND
GND
20
GEMS5
EVEN G5 INPUT
21
GEMS4
EVEN G4 INPUT
22
GEMS3
EVEN G3 INPUT
23
GEMS2
EVEN G2 INPUT
24
GEMS1
EVEN G1 INPUT
25
GND
GND
26
VCCO
3.3 V INPUT
27
GEMS0
EVEN G0 INPUT
28
VCCINT
2.5 V INPUT
29
BEMS7
EVEN B7 INPUT
30
BEMS6
EVEN B6 INPUT
31
BEMS5
EVEN B5 INPUT
32
GND
GND
33
BEMS4
EVEN B4 INPUT
34
BEMS3
EVEN B3 INPUT
35
BEMS2
EVEN B2 INPUT
36
BEMS1
EVEN B1 INPUT
37
BEMS0
EVEN B0 INPUT
38
VCCINT
2.5 V INPUT
39
VCCO
3.3 V INPUT
40
GND
GND
41
NC
RESERVED
43
NC
RESERVED
44
NC
RESERVED
45
NC
RESERVED
46
NC
RESERVED
47
NC
RESERVED
48
NC
RESERVED
49
NC
RESERVED
50
M1
MODE PIN INPUT 1 FOR CONFIG
51
GND
GND
52
M0
MODE PIN INPUT 0 FOR CONFIG
53
VCCO
3.3 V INPUT
54
M2
MODE PIN INPUT 2 FOR CONFIG
55
NC
RESERVED
56
NC
RESERVED
57
MP_DA
3-WIRE SERIAL DATA INPUT
58
MP_CK
3-WIRE SERIAL CLOCK INPUT
59
MP_CS
3-WIRE SERIAL CHIP SELECTION INPUT
60
DDC_RST
3-WIRE SERIAL RESET INPUT
61
DQ23
DATA BUS D23 INPUT/OUTPUT FOR SDRAM
62
DQ22
DATA BUS D22 INPUT/OUTPUT FOR SDRAM
63
DQ21
DATA BUS D21 INPUT/OUTPUT FOR SDRAM
64
GND
GND
65
VCCO
3.3 V INPUT
66
VCCINT
2.5 V INPUT
67
DQ20
DATA BUS D20 INPUT/OUTPUT FOR SDRAM
68
DQ19
DATA BUS D19 INPUT/OUTPUT FOR SDRAM
69
DQ18
DATA BUS D18 INPUT/OUTPUT FOR SDRAM
70
DQ17
DATA BUS D17 INPUT/OUTPUT FOR SDRAM
71
DQ16
DATA BUS D16 INPUT/OUTPUT FOR SDRAM
72
GND
GND
73
DQM2
MASK OUTPUT 2 (DQ16 TO DQ23)
74
A2
ADDRESS BUS A2 OUTPUT FOR SDRAM
75
A1
ADDRESS BUS A1 OUTPUT FOR SDRAM
76
VCCINT
2.5 V INPUT
77
CLK(GCK1)
3-WIRE SERIAL CLOCK INPUT
78
VCCO
3.3 V INPUT
79
GND
GND
80
GCK0
3-WIRE SERIAL CHIP SELECTION INPUT
81
A0
ADDRESS BUS A0 OUTPUT FOR SDRAM
82
A10
ADDRESS BUS A10 OUTPUT FOR SDRAM
83
BA1
BANK ADDRESS OUTPUT 1
84
BA0
BANK ADDRESS OUTPUT 0
85
GND
G
ND
86
CS#
CHIP SELECTION INPUT
87
RAS#
COMMAND INPUT (RAS#)
88
CAS#
COMMAND INPUT (CAS#)
89
WE#
COMMAND INPUT (WE#)
90
NC
RESERVED
91
VCCINT
2.5 V INPUT
92
VCCO
3.3 V INPUT
93
GND
GND
94
DQM0
MASK OUTPUT 0 (DQ0 TO DQ7)
95
DQ7
DATA BUS D7 INPUT/OUTPUT FOR SDRAM
96
DQ6
DATA BUS D6 INPUT/OUTPUT FOR SDRAM
97
DQ5
DATA BUS D5 INPUT/OUTPUT FOR SDRAM
98
DQ4
DATA BUS D4 INPUT/OUTPUT FOR SDRAM
99
DQ3
DATA BUS D3 INPUT/OUTPUT FOR SDRAM
100
DQ2
DATA BUS D2 INPUT/OUTPUT FOR SDRAM
101
DQ1
DATA BUS D1 INPUT/OUTPUT FOR SDRAM
102
DQ0
DATA BUS D0 INPUT/OUTPUT FOR SDRAM
103
GND
GND
104
DONE
CONFIG COMPLETION INPUT/OUTPUT
105
VCCO
3.3 V INPUT
106
PROGRAM
CONFIG CONTROL SIGNAL INPUT
107
INIT
RESET INPUT/OUTPUT FOR CONFIG
108
NC
RESERVED
109
NC
RESERVED
110
NC
RESERVED
111
NC
RESERVED
112
NC
RESERVED
113
NC
RESERVED
114
NC
RESERVED
115
NC
RESERVED
116
GND
G
ND
117
VCCO
3.3 V INPUT
118
VCCINT
2.5 V INPUT
119
NC
RESERVED
120
RE7
EVEN R7 OUTPUT
121
RE6
EVEN R6 OUTPUT
122
RE5
EVEN R5 OUTPUT
123
RE4
EVEN R4 OUTPUT
124
GND
GND
125
RE3
EVEN R3 OUTPUT
126
RE2
EVEN R2 OUTPUT
127
RE1
EVEN R1 OUTPUT
128
VCCINT
2.5 V INPUT
129
RE0
EVEN R0 OUTPUT
130
VCCO
3.3 V INPUT
131
GND
G
ND
132
GE7
EVEN G7 OUTPUT
133
GE6
EVEN G6 OUTPUT
134
GE5
EVEN G5 OUTPUT
135
GE4
EVEN G4 OUTPUT
136
GE3
EVEN G3 OUTPUT
137
GND
G
ND
Pin No
.
Pin Name
I/O
Pin Function