RELEASE
Revision B1
©Serious Integrated, Inc.
38
The SIM535 exposes this
DAC0_OUT
signal on the
16-pin Power/Communications Connector
as well as the
60-Pin Board-
to-Board Expansion Connector
for inexpensive mono audio output or analog device control. For more sophisticated and
higher quality audio output, the SH7269’s I2S port is available to daughter cards on the
60-Pin Board-to-Board Expansion Connector
.
The SH7269’s Serial I/O with FIFO peripheral has an internal bit rate generator which can derive the bit-clock from the
frequency supplied on the SH7269’s
AUDIO_CLK
pin: divisors of ½ to 1/1024 are possible. Do not confuse the bit rate of
the clock delivered to the DAC with the sample rate of data delivered to the DAC. They may or may not be related.
On SIM535 variants with the
clock synthesizer
the
AUDIO_CLK
pin is driven by default at 24.576MHz (which is 48 KHz *
512, a standard audio frequency) and this frequency can be changed at runtime via the clock synthesizer’s I2C port.
On SIM535 variants with a single 12MHz input clock, the
AUDIO_CLK
pin is also driven by this frequency (along with the
CPU and USB peripherals) and cannot be modified at runtime.
When the FIFO empty/watermark signals are programmed to drive DMA or ISRs, the bit clock is directly tied to the
sample rate: the sample rate is the bit rate divided by the frame size. This mode has the advantage of leveraging the
FIFO, minimizing interrupts/DMA cycles, and not requiring any other timing. The downside of this mode is the relative
inflexibility of the sample rate. With VersaClock® enabled variants the
AUDIO_CLK
is very flexible, however in variants
with a 12MHz fixed
AUDIO_CLK
the sample rate precision and options are limited.
A different sample rate generation mechanism with more 12MHz
AUDIO_CLK
flexibility can be used: The frame-to-frame
timing can be independently driven by a Count Match Timer (CMT) module at whatever frequency the programmer
desires. Upon match, the CMT can cause the DMA unit to deliver a new sample to the Serial I/O FIFO. In this mode, the
FIFO is only used for a single sample at a time and the bitrate to the DAC must exceed the needs of the frame-to-frame
rate or the timing will be violated and the FIFO will overflow.
Of course, if the DAC is being used as a non-timed output the FIFO can be loaded with the new set point value as desired.
USER PUSHBUTTON SWITCH AND LEDS
Some SIM535 variants have a single end-user-friendly pushbutton switch on the display-side of the module near the LCD
panel. The switch is connected to an MCU input that is both a general purpose input and also an interrupt input that can
wake the MCU from various sleep modes. A front panel captive button or plunger can be positioned to actuate this
switch. There is no requirement for an end-system to use this switch; the enclosure may cover it completely and render
it inaccessible if desired.
The pushbutton, on depression, can generate an interrupt to wake the CPU.
See the
Interrupt Summary
for the complete table of external peripheral interrupts.
Some SIM535 variants have a bi-color (red/green) LED located on front of the display-side of the module. A bi-color LED
is actually two independent LEDs in one package: the LED on the SIM535 has red and green LEDs that, when both are on,
have an amber hue. Typically, a plastic or metal front panel enclosure will expose this LED through a plastic light pipe;
for example, the
BiVar PLP1-125-F
. There is no requirement for an end-system to expose this LED. The enclosure may
cover it completely and render it un-viewable if desired.
Schematic Signal Name
Description
MCU
Name
PF16/IRQ4-SW1#
Switch Input (active low)
PF16/IRQ4
PG26/LED_RED
LED Right Red
PG26
PG27/LED_GRN
LED Right Green
PG27
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