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CHAPTER 3
Target interface SWD
3.2 Target interface SWD
If SWD (+ optional SWO) support is required on the target hardware to be designed, the
following signals need to be connected:
• #RESET (PA1 / Pin 11)
• SWCLK (PA2 / Pin 12)
• SWO (PA3 / Pin 13)
• SWDIO (PA4 / Pin 14)
If SWO support is not required (e.g. when the target CPU is Cortex-M0/M0+ based, which
does not provide SWO support), the SWO signal can be left open.
J-Link-OB-STM32F072-128KB-Cortex-M User Guide
(UM08029)
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