SM-B69
SM-B69 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.1 - Author:A.R - Reviewed by M.B. - Copyright © 2020 SECO S.p.A.
15
2.1
Introduction
The SM-B69 is a SMARC Rel. 2.1 compliant module based on the Intel
®
Atom , Pentium
®
and Celeron
®
family of System-on-Chips (SOCs) formerly coded as Apollo
Lake, a series of Single/ Dual / Quad SOCs with 64-bit instruction set.
These SOCs embed all the features usually obtained by combination of CPU + platform Controller hubs, all in one single IC, which allows, therefore, the system
minimisation and performance optimisation, which is essential for boards with sizes so reduced as for
ering
the computing abilities of a standard board, with the possibilities of combining with a ready-to-use carrier board like the SECO CSM-B79 or customised carrier board.
The board is also available in EXTREME configuration, with all the components mounted onboard certified for industrial temperature ranges (this configuration is not
available with the Celeron
®
processors).
The embedded memory controller allows the integration of up to 8GB of LPDDR4 Memory directly soldered onboard, speed up to 2400MHz.
All SOCs embed an Intel
®
HD Graphics 500 series controller, which offer high graphical performances, with support for Microsoft
®
DirectX12, OpenGL 4.3, OpenCL
2.0, OGL ES 3.0 and HW acceleration for video encoding and decoding of HEVC (H.265), H.264, MVC, VP8, VP9, JPEG/MJPEG. It is also possible the HW video
decoding only of MPEG2, VC-1 and WMV9.
This embedded GPU is able to drive three independent displays, by using the interfaces available on SMARC connector: one DP, one HMDI or DP (factory alternatives)
and one eDP + MIPI-DSI or Dual Channel 18/24bit LVDS (factory alternatives).
Mass Storage capabilities of the board include one external S-ATA Gen3 channel, a standard 4-bit SD interface and one optional eMMC 5.0 Drive soldered on
board.
Other than the interfaces already discussed previously, on SMARC connector there are the signals necessary for the implementation of GB, up to 4 ports in USB2.0
only and up to 2 Super Speed (SS) ports (i.e. USB 3.0 compliant), 4 x PCI-Express lanes, HD and I
2
S Audio interfaces, I
2
C, SPI, LPC and SM buses, HS-UART and
UART interfaces.
Interfacing to the board comes through a single card edge connector, whose pinout is defined by SMARC specifications Rel.2.1. For external interfacing to standard
devices, a carrier board with a 230-pin MXM connector is needed. This board will implement all the routing of the interface signals to external standard connectors,
as well as integration of other peripherals/devices not already included in SM-B69 CPU module.
Please refer to following chapter for a complete list of all peripherals integrated and characteristics.
