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Auto Configuration
Auto Configuration selects predetermined optimal values of chipset parameters. When
Disabled, chipset parameters revert to setup information stored in CMOS. Many fields
in this screen are not available when Auto Configuration is Enabled.
EDO DRAM Speed Selection
The value in this field must correspond to the speed of the DRAM installed in your
system. DO NOT change the default setting of this field, as determined by the system
board manufacturer for the installed DRAM. This value is access speed, so a lower
value means a faster system. This field applies only if EDO DRAM is installed in the
system.
EDO CASx# MA Wait State
The board designer may elect to insert one additional wait state before the assertion of
the first CASx# for page hit cycles, thus allowing one additional clock of MA setup time
to the CASx# for the leadoff page hit cycle. Do not change from the manufacturer’s
default unless you are getting memory addressing errors. This field applies only if EDO
DRAM is installed in the system.
EDO RASx# Wait State
The board designer may elect to insert one additional wait state before RAS# is
asserted for row misses, thus allowing one additional MAX[13:0] setup time to RASx#
assertion. This field applies only if EDO DRAM is installed in the system.
SDRAM RAS to CAS Delay
This field lets you insert a timing delay between the CAS and RAS strobe signals, used
when DRAM is written to, read from, or refreshed. Fast gives faster performance; and
Slow gives more stable performance. This field applies only when synchronous DRAM
is installed in the system.
SDRAM RAS Precharge Time
If an insufficient number of cycles is allowed for the RAS to accumulate its charge
before DRAM refresh, the refresh may be incomplete and the DRAM may fail to retain
data. Fast gives faster performance; and Slow gives more stable performance. This
field applies only when synchronous DRAM is installed in the system.
SDRAM CAS Latency Time
When synchronous DRAM is installed, the number of clock cycles of CAS latency
depends on the DRAM timing. Do not reset this field from the default value specified by
the system designer.