4.18
SEL-587Z Instruction Manual
Date Code 20020903
Control Logic
Close Logic (CL, ULCL, 52A, CFD)
Close Logic (CL, ULCL, 52A, CFD)
The close logic in
provides flexible circuit breaker closing with
SEL
OGIC
control equation settings:
CL–(close conditions, other than
CLOSE
command)
ULCL–(unlatch close conditions, other than breaker status, or
close failure)
52A–(breaker status)
CFD–(Close Failure Time)
Figure 4.8
Close Logic.
Set Close
The CLOSE Relay Word bit can be asserted to logical 1 if all the following are
true:
The unlatch close condition is not asserted (ULCL = logical 0).
The circuit breaker is open (52A = logical 0).
A close failure condition does not exist (Relay Word bit
CF = 0).
In addition, one of the following must occur:
The serial communications port
CLOSE
command is issued
(with Relay Word bit CC in the CL equation).
SEL
OGIC
control equation setting CL goes from logical 0 to
logical 1 (rising-edge transition).
Unlatch Close
If the CLOSE Relay Word bit is asserted at logical 1, it stays asserted at
logical 1 until one of the following occurs:
The unlatch close condition asserts (ULCL = logical 1).
The circuit breaker closes (52A = logical 1).
The Close Failure Timer times out (Relay Word bit CF = 1).
The Close Failure Timer is inoperative if setting CFD = 0. Then, the CLOSE
Relay Word bit can be deasserted to logical 0 only if either of the following
occurs:
The unlatch close condition asserts (ULCL = logical 1).
The circuit breaker closes (52A = logical 1).
CFD
0
CLOSE
CF
Relay
Word
Bits
ULCL
52A
CL
Settings
Rising-
edge detect
Pulses
(logical 1) for
one processing
interval if Close
Failure Timer times out
Close Failure
Timer
Logical 1 (setting CFD
≠
0;
Close Failure Timer Operative
Logical 0 (setting CFD = 0;
Close Failure Timer Inoperative
Содержание SEL-587Z
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