MSR120D Programmer’s Manual UDN PM009 Rev. E
Section 5 – Configuration Commands 2005/2/23
Byte 5 in EEPROM
Table 5-26. Byte 5 of EEPROM Status
Bit
7
Bit
6
Bit
5
Bit
4
Address
(Hex code)
Bit
3
JIS Read
Head
Bit
2
Self-Arm
Mode
Bit
1
Bit
0
Buzzer
* * * *
*
0 Without
0 Disable
*
0
Disable
* * * *
*
1 With
1 Enable
*
1
Enable
*
*
*
* * * *
*
* *
* *
*
*
*
* * * *
*
* *
* *
*
*
*
* * * *
*
* *
* *
*
*
*
* * * *
*
* *
* *
Byte 6 in EEPROM: Track Separator Setting
Hex code “00h” means do not transmit this byte.
Byte 7-12 in EEPROM:
Track 1 Prefix Code Setting
Byte 13-18 in EEPROM:
Track 2 Prefix Code Setting
Byte 19-24 in EEPROM:
Track 3 Prefix Code Setting
Byte 25-30 in EEPROM:
Track 1 Suffix Code Setting
Byte 31-36 in EEPROM:
Track 2 Suffix Code Setting
Byte 37-42 in EEPROM:
Track 3 Suffix Code Setting
Note: Each byte in byte 7-42 is Hex code. When one of the byte is “00h” the device do not transmit data from this
byte to the end byte of the block.
Byte 43-45 in EEPROM:
Channel A of Track 1 Setting
Byte 47-49 in EEPROM:
Channel B of Track 1 Setting
Byte 51-53 in EEPROM:
Channel C of Track 1 Setting
Byte 55-57 in EEPROM:
Channel A of Track 2 Setting
Byte 59-61 in EEPROM:
Channel B of Track 2 Setting
Byte 63-65 in EEPROM:
Channel C of Track 2 Setting
Byte 67-69 in EEPROM:
Channel A of Track 3 Setting
Byte 71-73 in EEPROM:
Channel B of Track 3 Setting
Byte 75-77 in EEPROM:
Channel C of Track 3 Setting
Byte 78-84 in EEPROM:
Reserved.
Byte 85 in EEPROM:
Raw Data Output Mode Setting.
Bit-0 = 1 is enable and bit-0 = 0 is disable. Bit 1-7 is 0.
Byte 86-98 in EEPROM:
Reserved.
Note: Each byte in byte 43-77 is Hex code. The first byte of each block represents card type. The second byte of
each block represents the start address of transmitting data. The third byte of each block represents the end
address of transmitting data.
Note: Byte 46, 50, 54, 58, 62, 66, 70, 74 are not used.
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