8
0
IntReq0 A
IRQ0 A
R
This bit is set high when an IntReq0for IP slot A is asserted. It is cleared when the
interrupt is cleared. This bit is not latched on the Flex/104A.
IP Access Register
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit
X X X X X X X X X X X X X X X X
Read
X X X X X X X
SLOT
IPSEL
IP
A6:1
Write
0 0 0 0 0 0 1 0 0
IRQ1
B
IRQ1
A
0 0 0
IRQ0
B
IRQ0
A
Reset
8
IP Slot Select
SLOT
W
This bit selects which IP slot is accessed. When this bit is zero, slot A is selected. When
one, slot B is selected.
7:6
IP Access Select
IPSEL
W
The IndustryPack bus provides for four address spaces: I/O, Memory, ID, and Interrupt.
These two bits determine what kind of access is made to the IP.
D7 D6 Access
Space
0 0 I/O
Space
0 1 Memory
Space
1 0 ID
Space
1 1 Interrupt
Space
Figure 6 IP Access Register Settings
5:0
IP Address Bit
IP A6:1
R
These bits correspond to six dedicated address bits on the IP bus. When accessing an
IP, the value of the offset location for a given register on the IP must be programmed into
this field. Remember that the Flex/104A does not recognize the IP A0 bit and therefore
the value in the IP user manual must be shifted right by one bit.
Consider the following example for configuring the IP Access Register. Assume that an
IP is installed in slot A and that a register at offset 0x42 in Memory Space is to be
accessed. First, since the IP is in slot A, D8 must be set to zero. Next since the register
is located in memory space on the IP, bits D7 and D6 must be set to 01. Finally, the
offset of 0x42 must be shifted right by one bit. This yields a value of 0x21 or a binary
value of 100001. Putting all these bits together yields a value of 0x0061. This is the
value that must be written into the IP Access Register before accessing the Data
Register. Remember that the Flex/104A only recognizes 16-bit accesses.
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