– 2 –
Table 1-1. CCD Pin Description
Fig. 1-1. CCD Block Diagram
1. OUTLINE OF CIRCUIT DESCRIPTION
1-1. CA1 CIRCUIT DESCRIPTION
1. IC Configuration
IC901 (ICX495BQF) CCD imager
IC905 (AD9949KCPZ) H driver, CDS, AGC and A/D converter
2. IC901 (CCD imager)
[Structure]
Interline type CCD image sensor
Image size
Diagonal 7.19 mm (1/2.5 type)
Pixels in total
2668 (H) x 1970 (V)
Recording pixels
2592 (H) x 1944 (V)
8
1
26
27 28
2
3
4
5
6
7
23
24
25
G
B
R
G
R
G
G
B
G
B
B
G
B
G
R
G
R
G
G
B
R
G
R
G
9
19
21
20
V
L
H
Ø
2B
G
R
B
G
G
R
B
G
10
22
B
G
R
G
G
B
R
G
11
V
Ø
6
12
V
Ø
7A
18
H
Ø
1B
17
Ø
RG
GND
GND
GND
Ø
SUB
C
SUB
NC
H
Ø
1A
H
Ø
2A
V
Ø
HLD
V
Ø
5B
V
Ø
5A
V
Ø
4
V
Ø
ST
V
Ø
3B
V
Ø
3A
V
Ø
2
V
Ø
1B
V
Ø
1A
R
G
R
G
G
B
G
B
13
14
16
V
DD
15
V
OUT
V
Ø
7B
V
Ø
8
(Note)
(Note) : Photo sensor
Horizontal register
Vertical register
Pin No.
1
Symbol
2
3
4
5
6
7
8
9
10
Vø
1A
Vø
1B
Vø
2
Vø
3A
Vø
3B
Vø
ST
Vø
4
Vø
5B
Vø
HLD
Pin Description
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Horizontal addition control clock
Vertical register transfer clock
Vertical register transfer clock
Horizontal addition control clock
Vertical register transfer clock
Vertical register transfer clock
Vø
5A
Vertical register transfer clock
Pin No.
15
Symbol
16
17
18
19
20
21
22
23
24
V
OUT
V
DD
øRG
Hø
1B
Hø
2B
GND
GND
øSUB
C
SUB
Pin Description
Signal output
Circuit power
Reset gate clock
Substrate bias
Horizontal register transfer clock
Horizontal register transfer clock
GND
GND
Substrate clock
GND
GND
11
Vø
6
Vertical register transfer clock
12
Vø
7A
Vertical register transfer clock
13
Vø
7B
Vertical register transfer clock
14
Vø
8
Vertical register transfer clock
25
NC
-
26
V
L
Protection transistor bias
27
Hø
1A
Horizontal register transfer clock
28
Hø
2A
Horizontal register transfer clock