– 3 –
1A 1
1Y 2
2A 3
2Y 4
3A 5
3Y 6
GND 7
4Y
8
4A
9
5Y
10
5A
11
6Y
12
6A
13
V
CC
14
Fig. 1-3. IC903 Block Diagram
Fig. 1-4. IC902 Block Diagram
3. IC903 (H Driver) and IC902 (V Driver)
An H driver (IC903) and V driver (IC902) are necessary in
order to generate the clocks (vertical transfer clock, horizon-
tal transfer clock and electronic shutter clock) which driver
the CCD.
IC902 is an inverter IC which drives the horizontal CCDs (H1
and H2). In addition the VREG 0~7, VXREG2 and VXREG3
signals which are output from IC102 are the vertical transfer
clocks. The clock is drived until peak value which necessary
CCD at IC902.
4. IC901 (CDS, AGC Circuit and A/D Converter)
The video signal which is output from the CCD is input to
Pins (26) and (27) of IC901. There are S/H blocks inside IC905
generated from the XSHP and XSHD pulses, and it is here
that CDS (correlated double sampling) is carried out.
After passing through the CDS circuit, the signal passes
through the AGC amplifier. It is A/C converted internally into
a 10-bit signal, and is then input to IC102.
Fig. 1-5. IC901 Block Diagram
27
29
36
26
16
22
21
30
23
19
11
12
17
PBLK
A/D
ACVDD
CMLEVEL VRT VTB STBY CLPOB ADCMODE
TIMING
GENERATOR
CLPDM
SHP SHD ADCCLK
PIN
DIN
ADCIN
DOUT
DRVDD
DVDD
ADVDD
2
37
20
18
47
48
43
33
41
CLAMP
REFERENCE
CLAMP
CDS
PGA
MUX
S/H
AD9802
10
OUT_NSUB
GND
OUT_1
OUT_2
OUT_3
OUT_4
OUT_5
OUT_6
OUT_7
OUT_8
OUT_9
OUT_10
CAP5V
CAPNS
GND
VDD
VDD
OCNT
DUTY
IN_1
IN_2
IN_3
IN_4
IN_5
IN_6
IN_7
IN_8
IN_9
IN_10
IN_NSUB
Power circuit
OCNT circuit
OCNT circuit
DUTY circuit
2
3
4
5
6
7
8
9
10
11
12
13
14
15
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
1
