-46-
Control Port Functions
67
MD2
MD2
Operation Mode Control2
I
“H” Fixed
68
PF7/Ø
Ø
ØOutput
O
-
69
PF6/AS
AS
ASOutput
O
-
70
PF5/RD
RD
Read Signal
O
SRAM Control
71
PF4/HWR
HWR
Write Signal (Upper 8 bits)
O
SRAM Control
72
PF3/LWR/ADTRG/IRQ3
SRAM_INTR
DualRam Interrupt
I
“L”active
73
PF2/WAIT
TURBO_CS
Chip Select for Turbo Gate Array
O
“H”: active
74
PF1/BACK/BUZZ
SDATA
Serial Data output
O
“L”: active
75
PF0/BREQ/IRQ2
FLASH_MODE
Flash Enable Control
O
76
P30/TxD0
Lamp TX
Choko TxD
O
“L”: active
77
P31/RxD0
Lamp RX
Choko RxD
I
“L”: active
78
P32/SCK0/SDA1/IRQ4
SDA 2
IIC Bus 2 SDA
I/O
“L”: active
79
P33/TxD1/SCL1
SCL 2
IIC Bus 2 SCL
O
“L”: active
80
P34/RxD1/SDA0
SDA 1
IIC Bus 1 SDA
I/O
“L”: active
81
P35/SCK1/SCL0/IRQ5
SCL 1
IIC Bus 1 SCL
O
“L”: active
82
P36
SENB
S/H Enable
O
“H”: active
83
P77/TXD3
MCI TX
Viewer TxD
O
“L”: active
84
P76/RXD3
MCI RX
Viewer RxD
I
“L”: active
85
P75/TMO3/SCK3
SCLK
Serial Data Output
O
86
P74/TMO2/MRES
M-RESET
manual Reset
I
Reset at “L”
87
P73/TMO1/CS7
88
P72/TMO0/CS6
CS6
DualRam Chip Select
O
“H”: active
89
P71/TMRI23/TMCI23/CS5
OPT_ECO
Eco Mode Option
I
“H”: Eco"
90
P70/TMRI01/TMCI01/CS4
OPT_BRAND2
Option Setting
I
91
PG0/IRQ6
VSYNC
PW463DVH Input for Choko
I
“H”: active
92
PG1/CS3/IRQ7
USB_INTR
USB interrupt Signal
I
“L”: active
93
PG2/CS2
CS2
SRAM Chip Select
O
“L”: active
94
PG3/CS1
CS1
USB Chip Select
O
“L”: active
95
PG4/CS0
BLAST_SW
Lamp Ballast Drive On/Off (Not used)
O
96
PE0/D0
SDA 3
IIC Bus 3 SDA
I/O
“L”: active
97
PE1/D1
SCL 3
IIC Bus 3 SCL
O
“L”: active
98
PE2/D2
SCL 4
IIC Bus 4 SCL
O
“L”: active
99
PE3/D3
SDA 4
IIC Bus 4 SDA
I/O
“L”: active
100
PE4/D4
PW_RESET
PW463 Reset Output
O
Reset at “L”->”H”->”L“
Pin No.
Name
Function Name
Function
I/O
Action