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IC BLOCK DIAGRAM & DESCRIPTION
U0804 LC78663NRW(DVD FRONT END)
NO.
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Block
A/D
TEST pin
SLC
TEST pin
Power
supply
CMP
D/A
Power
supply
RF I/F
Microcom-
puter I/F
Power
supply
Block
Microcom-
puter I/F
DRAM I/F
NC
DRAM I/F
Microcom-
puter I/F
CD data
CD data
Pin Name
AD1
AD0
JV
RREC
RF-PH
RF-RH
TE
FE
TEST0
EFMINP
TEST1
EFMINN
SLCLPF0
SLCLPF1
SLCO1
SLCO2
AVDDI
AVSS
BHC
WO
TEC
VREF
TSTD1
TSTD0
FO
BST
TBAL
FBAL
SGC
SLDO
SPDO
TDO
FDO
DVDDO
DVSS
FG
HIRQB
HWAITB
HRESB
HRDB
HWRB
HCSB
HDATO
DVDD1
Pin Name
DVSS
HDAT1
HDAT2
HADT3
HADT4
HDAT5
HDAT6
HADT7
HADR0
HADR1
HADR2
HADR3
HADR4
HADR5
HADR6
MWEB
MRASIB
MA0
MA1
MA2
MA3
NC
NC
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MOEB
MCASUB
MCASLB
HADR7
HADR8
HADR9
HADR10
HADR11
HADR12
C2F
ROMXA
ROMCK
LRSY
DVDD1
DVSS
EMPH
Supplementation
Servo A/D AD1
Servo A/D AD0
Servo A/D JV
Servo A/D RREC
Servo A/D RF-PH
Servo A/D RF-BH
Servo A/D TE
Servo A/D FE
Test input 0
(Input "L" level)
EFM/EFM+ Input
Test input 1
(Input "L" Input)
EFM- Input
SLC
SLC
SLC
SLC
A/D D/A SLC Power source
[Analogue 3.3V]
Analogue GND
Comparator input
(RE-BH)
Comparator input
Comparator input
(TE)
Sarvo D/A Voltage reference
Sarvo D/A
Sarvo D/A TSTD0
Sarvo D/A FO
Sarvo D/A BST
Sarvo D/A TBAL
Sarvo D/A FBAL
Sarvo D/A SGC
Sarvo D/A SLDO
Sarvo D/A SPDO
Sarvo D/A TDO
Sarvo D/A FDO
Internal logic power source
[Digital 2.5V]
Digital GND
FG Counter input General-purpose port in/output
Interrupt signal output
Wait signal output
Servo reset input
Reag reset input
Write signsl input
Chip select signal input
DTA BUS 0
I/O Power source [Digital 3.3V]
Supplementation
Digital GND
Data bus 1
Data bus 2
Data bus 3
Data bus 4
Data bus 5
Data bus 6
Data bus 7
Address bus 0
Address bus 1
Address bus 2
Address bus 3
Address bus 4
Address bus 5
Address bus 6
WE Output
RAS Output I
DRAM Address bus 0
DRAM Address bus 1
DRAM Address bus 2
DRAM Address bus 3
NC pin which set,"H" or "L"
(662; DRAM Power ssupply [Digital 3.3V])
NC pin which set,"H" or "L"
(662;Digital GND)
DRAM Address bus 4
DRAM Address bus 5
DRAM Address bus 6
DRAM Address bus 7
DRAM Address bus 8
DRAM Address bus 9
DRAM Address bus 10
OE Output
CAS Output (Upper Byte)
CAS Output (Lower Byte)
Address bus 7
Address bus 8
Address bus 9
Address bus 10
Address bus 11
Address bus 12
Buffer memory access selector
C2 flag output Monitor pin 4
CD data output Monitor pin 3
CD dast output Monitor pin 2
shift clock output
CD data output L/R clock output Monitor pin 1
I/O power source
Digital GND
Deemphasis monitor pin Monitor pin 0
I/O
I
I
I
I
I
I
I
I
I
I
I
I
-
-
-
-
-
-
I
I
I
O
O
O
O
O
O
O
O
O
O
O
O
-
-
I/O
O
I
I
I
I
I
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
O
O
O
O
O
O
-
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
O
O
O
O
-
O
Содержание DVD-SL33KR
Страница 5: ... 4 EXPLODED VIEW CABINET CHASSIS 21 22 ...
Страница 20: ... 19 SCHEMATIC DIAGRAM POWER This is a basic schematic diagram ...
Страница 29: ... 37 36 WIRING DIAGRAM MAIN A SIDE ...
Страница 30: ... 39 38 WIRING DIAGRAM MAIN B SIDE ...
Страница 31: ... 40 WIRING DIAGRAM POWER YUV OUT MIC and DISPLAY POWER DISPLAY YUV OUT MIC ...