Sanyo DC-BM300, Руководство по обслуживанию

Страница: 14 / 26

- 13 -
IC102 LC78622NE (Digital Signal Processor)
EFMO VV
DD
VV
SS
PDO ISET FR PCK TAI
TST11
TEST1 TEST3 TEST5
TEST2 TEST4
V
DD
V
SS
C2F
DOUT
(NC)
LV
DD
LV
SS
MUTEL LCHO
MUTER
RV
DD
RV
SS
RCHO XV
DD
XOUT
XIN FSX
XV
SS
4.2M 16M EFLG EMPH CONT5
CONT4
CONT3
CONT2
CONT1 TGL RES JP+ JP- TOFF TES HFL
RWC
COIN
CQCK
SQOUT
WRQ
CS
SFSY
SBSY
SBCK
PW
V/P
CLV-
CLV+
FSEQ
EFMIN
DEFI
10
22
1
12
13
14
49
51
47
50
63
53
55
57
56
54
15 16 17 20 19 58 18 24 25 26 27 28 29 48 60 61 46 52 45 44 43 39 41 42 40 37 35 38 36
34
31
30
9 21 6 4 3 5 7 2 59 64 11 32 33 62 8 23
Slice level
Control
Subcode Dxract
QCRC
Syncrnous Detect
EFM Demodulation
VCO Clock Oscillator
& Clock Control
X'tal Root
Timing Generator
RAM Address
Generatorl
2Kz8bit
RAM
Billingual
Digital Out
General Ports
Digital Attenuator
Quadruple Over Sampling
Digital Filter
Interpolalation Mute
C1 C2 Error Detect &
Correct Control Flag
1bit DAC
L.P.F
CLV
Digital Servo
µ COM
Inter Fase
Servo Commander
IC BLOCK DIAGRAM & DESCRIPTION
No. Pin Name I/O Function No. Pin Name I/O Function
1 DEFI I Input terminal for detect signal of defect 32 TEST3 I Test pin.
2 TAI I Input terminal for test. 33 TEST4 I Test pin.
3 PDO O The phase comparison output terminal for 34 NC - Non connection.
external VCO control. 35 MUTEL O Mute output terminal for L-ch
4 VVSS - Ground terminal for built-in VCO 36 LVDD - Power supply for L-ch
5 ISET I Resistance connection terminal for 37 LCHO O Output terminal for L-ch
electric current adjustment of PDO output. 38 LVSS - GND for L-ch
6 VVDD - Built-in VCO power supply terminal. 39 RVSS - GND for R-ch
7 FR I VCO frequency range adjustment. 40 RCHO O Output terminal for R-ch
8 VSS - Ground for Digital 41 RVDD - Power supply for R-ch
9 EFMO O EFM signal output terminal for slice level control. 42 MUTER O Mute output terminal for R-ch
10 EFMIN I EFM signal input terminal for slice level control. 43 XVDD - Power supply of crystal oscillation
11 TEST2 I TEST pin. 44 XOUT O
12 CLV+ O Output terminal for Disc motor control. 45 XIN I
13 CLV- O Output terminal for Disc motor control. 46 XVSS - GND of crystal oscillation
14 V/P O Change of rough servo / phase control 47 SBSY O Output terminal for synchronizing signal of
Rough servo : "H", Phase control : "L" sub-cord block
15 HFL I Input terminal of track search signal. 48 EFLG O Output terminal for correction monitor of C1, C2,
16 TES I Input terminal of tracking error signal. Single and Double
17 TOFF O Output terminal of tracking off. 49 PW O Output terminal for sub-cord of P, Q, R, S, T, U and W
18 TGL O Output terminal for change of tracking gain. 50 SFSY O Output terminal for synchronizing signal of
19 JP+ O Output terminal for tracking jump control. sub-cord frame
20 JP- O Output terminal for tracking jump control. 51 SBCK I Input terminal for readout clock of sub-cord
21 PCK O Clock monitor output terminal for EFM data 52 FSX O Output terminal of Synchronizing signal (7.35kHz)
playback. (4.3218 MHz) 53 WRQ O Output terminal for standby of sub-cord Q output
22 FSEQ O Output terminal for detect of SYNC signal. 54 RWC I Input terminal of read / write control
23 VDD - +5V ( power supply terminal digital circuit) 55 SQOUT O Output terminal of sub-cord Q
24 CONT1 I/O 56 COIN I Input terminal of command from micro processor
25 CONT2 I/O This output can control at serial control from 57 CQCK I Clock input for reading sub-cord from SQOUT
26 CONT3 I/O micro processor. 58 RES I Reset (turn on : L)
27 CONT4 I/O 59 TST11 O Test pin
28 CONT5 I/O 60 16M O 16.9344MHz
29 EMPH O Output terminal of de-emphasis monitor . 61 4.2M O 4.2336MHz
"H" : de-emphasis 62 TEST5 I Test pin
30 C2F O Output terminal of C2 flag 63 CS I Chip select terminal
31 DOUT O Output terminal of digital out 64 TEST1 I Test pin
Connection terminal of crystal oscillation (16.9344MHz)