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IC BLOCK DIAGRAM & DESCRIPTION
IC501 LC78622 (Digital Signal Processor)
IC601 LA9240M (Servo Signal Processor)
EFMO
VV
DD
VV
SS
PDO ISET FR
PCK
TAI
TST11
TEST1
TEST3 TEST5
TEST2
TEST4
C2F
DOUT
(NC)
LV
DD
LV
SS
MUTEL
LCHO
MUTER
RV
DD
RV
SS
RCHO
XV
DD
XOUT
XIN
FSX
XV
SS
4.2M
16M
EFLG
EMPH
CONT5
CONT4
CONT3
CONT2
CONT1
TGL
RES
JP+
JP-
TOFF
TES
HFL
RWC
COIN
CQCK
SQOUT
WRQ
CS
SFSY
SBSY
SBCK
PW
V/P
CLV-
CLV+
FSEQ
EFMIN
DEFI
10
22
1
12
13
14
49
51
47
50
63
53
55
57
56
54
15
16
17
20
19
58
18
24 25 26 27 28
29
48
60
61
46 52 45 44 43
39 41 42
40
37
35
38
36
34
31
30
9
21
6
4
3
5
7
2
59 64 11
32 33 62
8
23
Slice level
Control
Subcode Dxract
QCRC
Syncrnous Detect
EFM Demodulation
VCO Clock Oscillator
& Clock Control
X'tal Root
Timing Generator
RAM Address
Generatorl
2KÅ~8bit
RAM
Billingual
Digital Out
General Ports
Digital Attenuator
Quadruple Over Sampling
Digital Filter
Interpolalation Mute
C1 C2 Error Detect &
Correct Control Flag
1bit DAC
L.P.F
CLV
Digital Servo
Servo Commander
FSS
64
63
62
61
60
59
58
57
56
55
54 53
52
51
50
49
48
47
46
45
44
43
41
40
39
38
37
36
35
34
33
42
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Vcc1
LDS
LDD
BH1 PH1
LF2
VR REF1 Vcc2
DRF CE DAT CL CLK
DEF
NC
TBC
FSC
DGND
SLI
SLC
RFS-
RFSM
CV+
CV-
SLOF
HFL
TES
TOFF
TGL
JP+
JP-
SL+
SL-
SLD
SLEQ
SPD
SP-
SPG
SPI
SP
AGND
FE-
FE
FA-
FA
FD-
FD
TO
JP
TD
TD-
TA
TH
SCI
TESI
TE
TE-
TB
F
E
FIN1
FIN2
APC
RF DET
REF
VCA
I/V
BAL
VCA
INTER FACE
É -com
SLC
RF Amp
TE
T.SERVO & T.LOGICK
F.SERVO & F.LOGICK
SPINDLE SERVO
SLED SERVO
Содержание CWM-460
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