Sanyo CP21SE1K, Руководство по обслуживанию

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Service Adjustments with Replacing Memory IC(IC802)
No. Item Range Data Description
47 BASEBAND TINT 50 0 ~ 7F 0 Base band tint control for component color signal by 7bits DAC
48 BASEBAND TINT 60 0 ~ 7F 0 Base band tint control for component color signal by 7bits DAC
49 HVCO FREERUN UP 0 ~ 1 0 Horizontal free-running frequency up
50 HALF H KILLER 0 ~ 1 0 Composite-Sync Half H Kill
51 H FREE 0 ~ 1 0 Horizontal forced free-running mode switch
52 H START 0 ~ 1 0 Horizontal output switch
53 AFC1 PULL UP 0 ~ 1 1 Horizontal AFC1 gain switch
54 HVCO PULL UP 0 ~ 1 0 Horizontal VCO Filter PULL UP
55 HVCO PULL DOWN 0 ~ 1 0 Horizontal VCO Filter PULL DOWN
56 AFC1 GAIN UP 0 ~ 3 0 Horizontal AFC1 gain switch
57 ACFQ IF CONT 0 ~ 1 1 AFC1 gain controlled by IF AGC
58 DOUBLE COINCI 0 ~ 1 0 Horizontal AFC1 Gain Controlled by FAST Horizontal Coincidence
59 AFC2 RAMP UP 0 ~ 1 0 AFC2 RAMP UP
60 FBP BTHL 0 ~ 1 0 FBP slice level switch
61 AFC2 GAIN UP 0 ~ 3 3 Horizontal AFC2 gain switch
62 HBLK RIGHT 0 ~ 3 1 Control edge of horizontal blanking pulse that is right side of picture
63 HBLK LEFT 0 ~ 3 0 Control edge of horizontal blanking pulse that is left side of picture
64 HBLK SEL 0 ~ 1 1 Horizontal blanking select
65 HD SEL 0 ~ 1 1 Horizontal time pulse for OSD
66 HV BLK OFF 0 ~ 1 0 H and V blanking off switch for RGB-OUT
67 BGP SHIFT 0 ~ 3 0 Burst Gate Pulse for Position Adjustment
68 SECAM BGP SHIFT 0 ~ 3 3 Burst Gate Pulse for Position Adjustment
69 BGP SEL 0 ~ 1 0 Burst Gate Pulse Mode Select
70 PSEUDO H COIN 0 ~ 1 0 Horizontal coincidence detection by fsc counter
71 AUTO SLICE LEVEL 0 ~ 7 0 Sync separator slice level down
72 VSYNC UP ON 0 ~ 1 0 Sync Separator Gain Up at vertical sync
73 AUTO SLICE SPEED UP 0 ~ 1 0 Auto Slice Speed Switch (Normal / Up)
74 AUTO SLICE SPEED DN 0 ~ 1 0 Auto Slice Speed Switch (Normal / Down)
75 AUTO SLICE DOWN 0 ~ 1 0 Sync detect level switch during video period.
76 HV FREE 0 ~ 1 0 Horizontal and Vertical forced free-running mode switch
77 V SYNC DET TIME 0 ~ 7 0 Vertical sync detect minimum time switch
78 V SYNC DET MODE 0 ~ 1 1 Vertical sync detect mode select
79 MACRO OFF 0 ~ 1 0 Switch to improvr macrovision signal ON/OFF
80 VBLK STOP 0 ~ 1 0 Vertical blanking stop
81 EQ LATCH OFF 0 ~ 1 0 AFC1 stop timing shift
82 HBLK STOP 0 ~ 1 0 Horizontal blanking stop
83 VRAMP TEST 0 ~ 1 0 Vertical Ramp Out Test
84 V 1 WINDOW 0 ~ 1 0 Vertical sync detect mode select
85 V FREE2 0 ~ 1 0 Vertical free-running mode when horizontal coincidence is low
86 V FREE 0 ~ 1 0 Vertical forces free-running mode switch
87 FORCE V MODE 0 ~ 3 0 Vertical frequency mode switch
88 V STD DET OFF 0 ~ 1 0 Vertical frequency standard / non-standard detection
89 V STD DET2 0 ~ 1 0 Vertical frequency standard / non-standard detection
90 V FREE FREQ 0 ~ 1 0 Vertical free-running frequency
91 OSD VD DELAY 0 ~ 1 0 VD TIMING delay for OSD TIMING
92 W VBLK ON 0 ~ 1 1 Vertical blanking wide mode 16:9
Following table shows the initial values which have been stored in the CPU ROM, and items for the service adjustments.
Service mode adjustments table in CPU ROM
SM_21-BE6V (AC7-A)AUS 5/9/08 11:11 AM Page 10