Samsung S5PC100X, Руководство пользователя

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SMDK-C100_USER’S MANUAL_REV 0.2
Use PLL
OFF x
No Use PLL
ON x
4.3 CONFIGURATION SWITCH DESCRIPTION IN CPU BOARD
4.3.1 CFGB3: FOR USING Controllable Regulator (ARM/INT)
CFGB3 Switch is used to enable shift register output. If the shift register is not enabled, the
default value of the VDD_1.2V_ARM/INT is determined with external pull up/down resisters.
Below is the description of the Regulator Control Signal.
LTC3714 (U22-For ARM, U25-For INT)
@
CFGB3[1]
: ON & ‘XEINT4(GPH04)’ : Logic “0”
VID4 VID3 VID2 VID1 VID0
Dynamic
Voltage scaling
0 1 0 0 1 1.300V
0 1 0 1 0 1.250V
0 1 0 1 1 1.200V
0 1 1 0 0 1.150V
0 1 1 0 1 1.100V
0 1 1 1 0 1.050V
0 1 1 1 1 1.000V
1 0 0 0 0 0.975V
1 0 0 0 1 0.950V
1 0 0 1 0 0.925V
1 0 0 1 1 0.900V
1 0 1 0 0 0.875V
1 0 1 0 1 0.850V
1 0 1 1 0 0.825V
1 0 1 1 1 0.800V
1 1 0 0 0 0.775V
1 1 0 0 1 0.750V
1 1 0 1 0 0.725V
1 1 0 1 1 0.700V