Samsung S3C9454B, Руководство пользователя

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S3C9454B/F9454B A/D CONVERTER
12-1
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A/D CONVERTER
OVERVIEW
The 10-bit A/D converter (ADC) module uses successive approximation logic to convert analog levels entering at
one of the nine input channels to equivalent 10-bit digital values. The analog input level must lie between the V
DD
and V
SS
values. The A/D converter has the following components:
— Analog comparator with successive approximation logic
— D/A converter logic
— ADC control register (ADCON)
— Nine multiplexed analog data input pins (ADC0–ADC8)
— 10-bit A/D conversion data output register (ADDATAH/L):
To initiate an analog-to-digital conversion procedure, you write the channel selection data in the A/D converter
control register ADCON to select one of the nine analog input pins (ADCn, n = 0–8) and set the conversion start or
enable bit, ADCON.0. The read-write ADCON register is located at address F7H.
During a normal conversion, ADC logic initially sets the successive approximation register to 200H (the
approximate half-way point of an 10-bit register). This register is then updated automatically during each
conversion step. The successive approximation block performs 10-bit conversions for one input channel at a time.
You can dynamically select different channels by manipulating the channel selection bit value (ADCON.7–4) in the
ADCON register. To start the A/D conversion, you should set a the enable bit, ADCON.0. When a conversion is
completed, ACON.3, the end-of-conversion (EOC) bit is automatically set to 1 and the result is dumped into the
ADDATA register where it can be read. The A/D converter then enters an idle state. Remember to read the
contents of ADDATA before another conversion starts. Otherwise, the previous result will be overwritten by the
next conversion result.
NOTE
Because the ADC does not use sample-and-hold circuitry, it is important that any fluctuations in the analog
level at the ADC0–ADC8 input pins during a conversion procedure be kept to an absolute minimum. Any
change in the input level, perhaps due to circuit noise, will invalidate the result.