Circuit Descriptions
7-18
Samsung Electronics
DIC1 shares the data bus of micom with other devices(A/V Decoder, EPROM, SRAM). CH2 shows the measure-
ment of a signal line of data bus. The inclining and rising part in CH2 indicates high impedence state after data bus
floating.The data bus is pulled up by 4.7K resistance.
• CH1 : ALE (MIC4-11, Address latch enable
signal)
• CH2 : HAD0-7 (MIC4-2 to 9, Main micom
address and data multiplexed bus)
• CH3 : HA0-7 (MIC4-19 to 12, Main micom
addreess 0-7)
Fig. 7-31
It shows access in fast page mode as waveform when DIC1 accesses external memory(4Mbit DRAM) at DVD
refresh.
• WE : Write enable(DIC2-7)
• OE : OUTPUT ENABLE (DIC2-22)
• RAS : RAW ADDRESS STROBE (DIC2-8)
• CAS : COLUMN ADDRESS STROBE (DIC2-23)
• ADRS : ADDRESS
• DATA : DATA
Fig. 7-32
It shows the external memory refresh of DIC1 and uses CAS Before RAS Refresh.
• DIC2 (4MDRAM) REFRESH TIME
Fig. 7-33
It shows refresh per approx. 31 usec as measurement of refresh waverform outputted by DIC1 in large timing.
Refresh time(Period) of DIC2(4MDRAM)
Fig. 7-34
1
2
3
WR
OE
RAS
ADRS
CAS
DATA
RAS
CAS
RAS
CAS
Содержание DVD-807K
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