Samsung DVD-807K, Руководство по обслуживанию

Страница: 36 / 165

6-25 Samsung Electronics
6-15 DIGITAL-TO-ANALOG CONVERTER WITH PLL (AIC3 ; PCM 1723)
Low-pass
Filter
V
OUT
L
CAP
V
OUT
R
ZERO
Multi-level
Dalta-Sigma
Modulator
BPZ-Cont.
OSC PLL
SCKO MCKO XTI XTO
256fs/384fs
Low-pass
Filter
DAC
BLOCK DIAGRAM
8X Oversampling
Digital Filter
with Function
Controller
Multi-level
Dalta-Sigma
Modulator
Serial
Input
I/F
Mode
Control
I/F
Power Supply
BCKIN
LRCIN
DIN
ML
MC
MD
RSTB
DAC
V
CP
PGND V
CC
AGND V
DD
DGND
PIN ASSIGNMENT
PIN
N A M E
I/O
1
2
3
4
5
6 '
7 '
8
'
9
'
1 0
1 1
1 2
1 3
1 4
1 5
1 6 'Ł
1 7 'Ł
1 8
'Ł
1 9
2 0
2 1
2 2
2 3
2 4
XTI
S C K O
V
C P
N C
M C K O
M L
M C
M D
R S T B
Z E R O
V
O U T
B
A G N D
V
C C
V
O U T
L
C A P
BCKIN
DIN
L R C I N
N C
R E S
V
D D
D G N D
P G N D
X T O
IN
O U T
P W R
N / A
O U T
IN
IN
IN
IN
O U T
O U T
G N D
P W R
O U T
IN
IN
IN
N / A
N / A
P W R
G N D
G N D
Out
F U N C T I O N
Master Clock Input.
System Clock Out. This output is 256fs or 384fs.
system clock generated by the internal PLL.
PLL Power Supply (+5V).
No Connection.
Buffered clock output of crystal oscillator.
Latch for serial control data.
Clock for serial control data.
Data for serial control.
Reset Input. When this pin is low, the digital filters and modulators are held in reset.
Zero Data Flag. This pin is low when the input data is continuously zero for more than
65,535 cycles ro BCKIN.
Right Channel Analog Output.
Analog Ground.
Analog Power Supply (+5V).
Left Channel Analog Output.
Common Pin for analog output amplifiers.
Bit Cclock for clocking in the audio data.
Serial audio data input.
Left/Right Word Clock. Frequency is equal to fs.
No Connection.
Reserved for factory use, do not connect.
Analog Power Supply (+5V).
Digital Ground.
PLL Ground.
Crystal oscillator output.
Note:(1)Schmitt triger input with intermal pull-up resistors. (2) Schmitt triger input.