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Load register
For each counter channel a 32-bit load register is available. The counter preset value must be written
to the load register from where it is transferred to the counter by means of a software command or by a hardware event.
Used DLL functions:
Name
Page
Function
UFC_SetLoadReg
23
Write to load register
UFC_LoadCounter
23
Software commend to transfer the value from the load register to the counter
UFC_SetLoadClearMode 22
Select a hardware source to transfer the contents of the load register to the counter
Table 6: DLL functions, load register
Latch register
For each counter channel two latch registers are available. Before the count values can be read out,
they must be stored in one of the latch registers. The values can be stored either individually for each counter channel
or simultaneously for several counter channels, either by a software command or by a hardware event.
Used DLL functions:
Name
Page
Function
UFC_SetLatchMode
23
Select a hardware source to transfer the contents of
the count value to the latch register
UFC_LatchImpuls
24
Generates a pulse that can be applied simultaneously to all
latch registers and to the OUT 4 output (X4, pin 14)
UFC_LatchCounter
24
Software command to transfer a count value into a latch register
Table 7: DLL functions, latch register
Status register
The following information can be obtained from the status register:
Counter input signals (tracks A, B and R)
Encoder interference signals (that may be present on encoders with TTL signals)
Encoder amplitude monitoring (only active for encoders with 1 Vpp signals and integrated in the UFC 430 module)
Encoder trigger signals (option for linear encoders)
Monitoring of the encoder chain of steps
Reference status (1st or 2nd reference mark traversed)