± 2g / 4g / 8g / 16g Tri-axis Digital
Accelerometer Technical
Reference Manual
PART NUMBER:
KX132-1211
Rev. 1.0
31-Jul-2019
36 Thornwood Dr.
–
Ithaca, NY 14850
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Page
29
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73
INC3
Interrupt Control 3. This register controls which axis and direction of tap/double tap can cause an interrupt.
If a direction’s
bit is set to “1”, a single or double tap in that direction will generate an interrupt. If it is set to “0”, a single or double tap
in that direction will not generate an interrupt. Note that to properly change the value of this register, the PC1 bit in
CNTL1 register
must first be set to “0”.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
TMEN
TLEM
TRIM
TDOM
TUPM
TFDM
TFUM
Reset Value
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
00111111
Address:
0x24
TMEN
– enables/disables alternate tap masking scheme
TMEN = 0
– alternate tap masking scheme disabled
TMEN = 1
– alternate tap masking scheme enabled
TLEM
– Tap Left (X-) state mask
TLEM = 0
– Tap engine ignores (X-) axis
TLEM = 1
– Enable the (X-) interrupt source
TRIM
– Tap Right (X+) state mask
TRIM = 0
– Tap engine ignores (X+) axis
TRIM = 1
– Enable the (X+) interrupt source
TDOM
– Tap Down (Y-) state mask
TDOM = 0
– Tap engine ignores (Y-) axis
TDOM = 1
– Enable the (Y-) interrupt source
TUPM
– Tap Up (Y+) state mask
TUPM = 0
– Tap engine ignores (Y+) axis
TUPM = 1
– Enable the (Y+) interrupt source
TFDM
– Tap Face Down (Z-) state mask
TFDM = 0
– Tap engine ignores (Z-) axis
TFDM = 1
– Enable the (Z-) interrupt source
TFUM
– Tap Face Up (Z+) state mask
TFUM = 0
– Tap engine ignores (Z+) axis
TFUM = 1
– Enable the (Z+) interrupt source
Reserved
– this bit is reserved, and its value should not be changed.
