Rohm BU7858KN, Техническая заметка

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The frequency characteristic (theorical value) when the recommended constants are used is shown below.
Fig.31 Low-band corrective circuit Frequency characteristic
● CPU INTERFACE
BU7858KN and BU7893GU can be controlled by using CPU interface.
【 BU7858KN 】
Fig.32 CPU I/F Timing Chart 1 (BU7858KN)
After the falling edge of NCS, SDATA inputs are settled by 16 clock of SCLK, and data is written in the rising edge of NCS.
The data format is “16bit right justified”.
CPU interface is that 1Byte=16bit. It is absolutely necessary to insert the interval of NCS=
“
H” between first Byte and
Second Byte because it is not compatible with continuous data transmission. For the following th, please wait the time more
than 1 SCLK Clock. (th
≧
tcyc)
Fig.33 CPU I/F Timing Chart 2 (BU7858KN)
・
AC Characteristics
Ta=25 ℃、 AVDD=DVDD=3.0V
Item Symbol Min Typ Max Unit Conditions
SCLK Width tcyc 250 - - ns
SDATA Input Hold Time tdh 50 - - ns
SDATA Input Set-up Time tds 50 - - ns
NCS Set-up Time tcs 50 - - ns
NCS Hold Time tch 50 - - ns
It is recommended to use exclusive lines for CPU interface.
-40
-35
-30
-25
-20
-15
-10
-5
0
5
10
1 10 100 1000 10000 100000
Frequency [Hz]
Ga
in
[d
B
]
After correction
Before correction
Amplifier output
A7
SCLK
SDATA
tcs
NCS
tds tdh
A6
D6 D5 D4 D3 D2 D1 D0 A5 A4 A3
A2
D7
A1
tch
tcyc
A0
N C S
S C L K
S D A TA
th