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SH7263/SH7203 Group 

Data Transfer to On-chip Peripheral Modules with DMAC

 

REJ06B0734-0101/Rev.1.01 

December 2008 

Page 12 of 17 

4.  Sample Program Listing "main.c" (4) 

161  

/* ----Setting DMA source address register---- */ 

162  

DMAC.SAR1.LONG = (unsigned long)src; 

163 

164  

/* ----Setting DMA reload source address register---- */ 

165  

DMAC.RSAR1.LONG = (unsigned long)src; 

166 

167  

/* ----Setting DMA destination address register---- */ 

168  

DMAC.DAR1.LONG = (unsigned long)dst; 

169 

170  

/* ----Setting DMA reload destination address register---- */ 

171  

DMAC.RDAR1.LONG = (unsigned long)dst; 

172  

173  

/* ----Setting DMA transfer count register---- */ 

174  

/* ----Setting DMA reload transfer count register---- */ 

175 

176  

switch(ts){ 

177  

case  DMA_SIZE_BYTE: 

178 

  DMAC.DMATCR0.LONG 

= 

size; 

   /* 

Specify transfer count (1/1)

 */ 

179  

 

DMAC.RDMATCR0.LONG = size;  

 

180  

 

break; 

181  

case  DMA_SIZE_WORD: 

182  

 

DMAC.DMATCR0.LONG = size >> 1u; 

 

/* 

Specify transfer count (1/2)

 */ 

183  

 

DMAC.RDMATCR0.LONG = size >> 1u;   

 

184  

 

break; 

185  

case  DMA_SIZE_LONG: 

186  

 

DMAC.DMATCR0.LONG = size >> 2u; 

 

/* 

Specify transfer count (1/4)

 */ 

187  

 

DMAC.RDMATCR0.LONG = size >> 2u;   

 

188  

 

break; 

189  

case  DMA_SIZE_LONGx4: 

190  

 

DMAC.DMATCR0.LONG = size >> 4u; 

 

/* 

Specify transfer count (1/16)

 */ 

191  

 

DMAC.RDMATCR0.LONG = size >> 4u;   

 

192  

 

break; 

193  

default: 

194  

 

break; 

195  

} 

196  

197  

/* ----Setting DMA channel control register---- */ 

198  

DMAC.CHCR1.LONG = 0x00001800ul |  (ts << 3u) | (ie << 2u) ; 

199  

 

/* 

200  

 

 bit31   

: TC DMATCR transfer0--------- 

 Transfer 

once 

201  

 

 bit30   

: reserve 0 

202  

 

 bit29   

: RLDSAR OFF : 0-------------   

Disable SAR reload function 

203  

 

 bit28   

: RLDDAR OFF : 0-------------   

Disable DAR reload function 

204  

 

 bit27-24 

: reserve 0 

205  

 

 bit23   

: DO over run0 : 0----------   

Unused 

206  

 

 bit22   

: TL TEND low active : 0----   

Unused 

207  

 

 bit21   

: reserve 0 

208  

 

 bit20   

: TEMASK : TE set mask : 0--   

Disable DMA transfer when TE bit is set 

209  

 

 bit19   

: HE :0---------------------   

Unused 

210  

 

 bit18   

: HIE :0--------------------   

Unused 

211  

 

 bit17   

: AM :0---------------------   

Unused 

212  

 

 bit16   

: AL :0---------------------   

Unused 

213  

 

 bit15-14 

: DM1:0 DM0:0---------------   

Fix destination address 

214  

 

 bit13-12 

: SM1:0 SM0:1---------------   

Increment source address 

215  

 

 bit11-8 

: RS : auto request : B'1000-   

DMA extension resource selector 

216  

 

 bit7 

 

: DL : DREQ level : 0 -------   

Unused 

 

Содержание REJ06B0734-0100

Страница 1: ...ook over all the business of both companies Therefore although the old company name remains in this document it is a valid Renesas Electronics document We appreciate your understanding Renesas Electronics website http www renesas com April 1st 2010 Renesas Electronics Corporation Issued by Renesas Electronics Corporation http www renesas com Send any inquiries to http www renesas com inquiry ...

Страница 2: ...ct for an application categorized as Specific or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics The quality grade of each Renesas Electronics product is Standard unless otherwise expressly specified in a Renesas Electronics data sheets or data books etc Standard Computers office equipment communications equipment test and meas...

Страница 3: ...dules with DMAC Introduction This application note provides an example of transferring data to on chip peripheral modules with the direct memory access controller DMAC of the SH7263 SH7203 Target Device SH7263 SH7203 Contents 1 Introduction 2 2 Description of Sample Application 3 3 Sample Program 9 4 Documents for Reference 15 ...

Страница 4: ...erating Frequency Internal clock 200 MHz Bus clock 66 67 MHz Peripheral clock 33 33 MHz C Compiler SuperH RISC engine family C C compiler package Ver 9 01 from Renesas Technology Compile Option cpu sh2afpu fpu single include WORKSPDIR inc object CONFIGDIR FILELEAF obj debug gbr auto chgincpath errorpath global_volatile 0 opt_range all infinite_loop 0 del_vacant_loop 0 struct_alloc 1 nologo 1 4 Rel...

Страница 5: ... CH3 can receive external requests Address space 4 Gbytes Length of transfer data Byte word 2 bytes longword 4 bytes and 16 bytes longword 4 Maximum transfer count 16 777 216 24 bits transfers Address mode Single address mode and dual address mode Transfer request Auto request external request and on chip peripheral module request SH7203 SH7263 SCIF 8 sources I2 C3 8 sources ADC 1 source MTU2 5 so...

Страница 6: ...Peripheral bus Internal bus DMAC module Iteration control Register control Start up control Request priority control Bus interface Bus state controller Legend RDMATCR DMA reload transfer count register CHCR DMA channel control register DMATCR DMA transfer count register DMAOR DMA operation register RSAR DMA reload source address register DMARS0 to DMARS3 DMA extension resource selectors 0 to 3 SAR...

Страница 7: ...the DMA transfer count to be reloaded Setting the DMA transfer mode CHCRn Set the TC transfer count mode bit Function 0 Transfer data once for each transfer request When the SCIF or IIC3 is selected as the transfer request source 1 Transfer data for the count specified in DMATCRn for each transfer requests Set the RLDSAR SAR reload function enable disable bit Function Enables disables reload funct...

Страница 8: ...ng SCIF transmit FIFO data empty transfer requests Timing of requesting data transfer from external memory to the SCIF transmit FIFO data register a transfer request is made when the number of data in transmit FIFO becomes 0 One data transfer One data transfer One data transfer Bus mastership Read Read Read Read Read Read Read Read Write Write Write Write Write Write Write Write Internal signal In...

Страница 9: ...isables SAR reload function RLDDAR 0 Disables DAR reload function DM B 00 Fixes destination address SM B 01 Increments source address RS B 1000 Extension resource selector TB 0 Cycle stealing mode TS B 00 Byte transfer IE 0 Disables interrupt request DMA channel control register 1 CHCR1 H FFFE 101C H 0000 1801 DE 1 Enables DMA transfer DMA source address register_1 SAR1 H FFFE 1010 Address where c...

Страница 10: ...yte transfer DMA_SIZE_WORD H 0001 Word transfer DMA_SIZE_LONG H 0002 Longword transfer DMA_SIZE_LONGx4 H 0003 16 byte transfer DMA_INT_DISABLE H 0000 DMA transfer end interrupt disabled DMA_INT_ENABLE H 0010 DMA transfer end interrupt enabled START END No Yes DMA transfer completed Initialize DMAC enable transfer io_init_dma1 Initialize SCIF enable transmission and transmission interrupts io_init_...

Страница 11: ...ion and Renesas Solutions 20 assume no responsibility for any damage liability or other loss rising 21 from these inaccuracies or errors 22 23 Copyright C 2007 Renesas Technology Corp All Rights Reserved 24 AND Renesas Solutions Corp All Rights Reserved 25 26 history 2007 12 27 ver 1 00 00 27 FILE COMMENT END 28 include string h 29 include iodefine h iodefine h is automatically created by HEW 30 3...

Страница 12: ...o be transmitted 80 const signed char data SCIF request DMAC Sample Software SH7203 r n 81 82 FUNC COMMENT 83 Outline Sample Program Main UART transmission with use of DMAC 84 85 Include include string h 86 87 Declaration void main void 88 89 Function The character string data stored in external memory is DMA transferred 90 to the SCIF transmit FIFO data register The DMAC is activated 91 by an SCI...

Страница 13: ...pt used not used 129 130 Argument void src Source address 131 void dst Destination address 132 size_t size Transfer size byte 133 unsigned int mode Transfer mode specifies the following with logical OR 134 DMA_SIZE_BYTE 0x0000 Byte transfer 135 DMA_SIZE_WORD 0x0001 Word transfer 136 DMA_SIZE_LONG 0x0002 Longword transfer 137 DMA_SIZE_LONGx4 0x0003 16 byte transfer 138 DMA_INT_DISABLE 0x0000 DMA tr...

Страница 14: ...R0 LONG size 1u 184 break 185 case DMA_SIZE_LONG 186 DMAC DMATCR0 LONG size 2u Specify transfer count 1 4 187 DMAC RDMATCR0 LONG size 2u 188 break 189 case DMA_SIZE_LONGx4 190 DMAC DMATCR0 LONG size 4u Specify transfer count 1 16 191 DMAC RDMATCR0 LONG size 4u 192 break 193 default 194 break 195 196 197 Setting DMA channel control register 198 DMAC CHCR1 LONG 0x00001800ul ts 3u ie 2u 199 200 bit31...

Страница 15: ...MAC DMAOR BIT DME 0ul Enable DMA transfer on all channels 233 DMAC DMAOR BIT DME 1ul 234 235 236 DMA transfer execution 237 DMAC CHCR1 BIT DE 1ul Enable DMA transfer 238 239 FUNC COMMENT 240 Outline DMAC stop 241 242 Include include iodefine h 243 244 Declaration void io_dma1_stop void 245 246 Function Detects the end of DMA transfer and disables DMA transfer 247 248 Argument void 249 250 Return V...

Страница 16: ...ssion reception by SCIF0 294 295 Setting FIFO control register SCFCRi 296 SCIF0 SCFCR BIT TFRST 1 Reset transmit FIFO 297 298 Setting serial control register SCSCRi 299 SCIF0 SCSCR BIT CKE 0x0 B 00 Internal clock 300 301 Setting serial mode register SCSMRi 302 SCIF0 SCSMR WORD scif_baud bps scsmr 303 Communication mode 0 Asynchronous mode 304 Character length 0 8 bit data 305 Parity enable 0 Disab...

Страница 17: ... Documents for Reference Software Manual SH 2A SH2A FPU Software Manual The most up to date version of this document is available on the Renesas Technology Website Hardware Manual SH7203 Group Hardware Manual SH7263 Group Hardware Manual The most up to date version of this document is available on the Renesas Technology Website ...

Страница 18: ...ebsite and Support Renesas Technology Website http www renesas com Inquiries http www renesas com inquiry csc renesas com Revision Record Description Rev Date Page Summary 1 00 Apr 17 08 First edition issued 1 01 Dec 17 08 Source file is updated All trademarks and registered trademarks are the property of their respective owners ...

Страница 19: ...especially high quality and reliability such as safety systems or equipment or systems for transportation and traffic healthcare combustion control aerospace and aeronautics nuclear power or undersea communication transmission If you are considering the use of our products for such purposes please contact a Renesas sales office beforehand Renesas shall have no liability for damages arising out of ...

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