P9415-R-EVK Evaluation Kit
R16UH0015EU0100 Rev.1.0
May 27, 2021
Page 27
Table 16. Date Register (0x0C)
Address
and Bit
Register Field Name
R/W
Default
Value
Function and Description
0x0c [96:0]
Date
R
–
12-byte string initialized with FW compile data code. The format of the
string is: “Mmm DD YYYY”, where Mmm is a three letter Month code,
followed by the date in the month and the year. The string is terminated
with 0x00.
Table 17. Time Register, (0x18)
Address
and Bit
Register Field Name
R/W
Default
Value
Function and Description
0x18 [64:0]
Time
R
–
8-byte string initialized with FW compile time code. The format of the
string is: “HH:MM:SS”. The string is not zero terminated.
Table 18. Part Number Register (0x20)
Address
and Bit
Register Field Name
R/W
Default
Value
Function and Description
0x20 [32:0]
Part Number
R
0x520000
00
Part number.
Note
: The bit definition in Rx mode and Tx mode is different.
Table 19. System Interrupt Clear Register (0x28, 0x29, 0x2A, 0x2B) in Rx Mode
Address
and Bit
Register Field Name
R/W
Default
Value
Function and Description
0x2B [7:0]
Reserved
R/W
0
Reserved
0x2A [7]
OVERCURRWARN
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
0x2A [6]
ADTERROR
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
0x2A [5]
ADTRCVD
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
0x2A [4]
ADTSENT
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
0x2A [3]
NTCOVERTEMP
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
0x2A [2]
VRECTON
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
0x2A [1:0]
Reserved
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
0x29 [7]
VSWITCHFAILED
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
0x29 [6]
SLEEPMODE
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
0x29 [5]
IDAUTHSUCCESS
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
0x29 [4]
IDAUTHFAILED
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
0x29 [3]
BCSUCCESS
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
0x29 [2]
BCTIMEOUT
R/W
0
AP writes 1 to clear the corresponding Interrupt Registers’ bit. This bit is
self-cleared to 0 (by M0) afterward.
