Renesas 7700 FAMILY, Руководство пользователя

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CONNECTION WITH EXTERNAL DEVICES
12.1 Signals required for accessing external devices
7751 Group User’s Manual 12–4
_
Table 12.1.1 Functions of pins P0 to P4 and E pin in memory expansion and microprocessor modes
Notes 1: In the memory expansion mode, this pin functions as a programmable I/O port and can be programmed as the clock
1
output pin by software.
2: This table shows the pins’ functions. Refer to the following about the input/output timing of each signal:
“12.1.2 Operation of bus interface unit (BIU)”; “12.2 Bus cycle”; “12.3 Ready function”; “12.4 Hold function”
“Chapter 15. ELECTRICAL CHARACTERISTICS.”
H L D A
BHE
ALE
R / W
H L D A
D
P
R D Y
1
H O L D
E
E
Pin
External data bus
width
16 bits
(BYTE = “L”)
A
7
to A
0
(P0)
A
7
— A
0
A
7
— A
0
8 bits
(BYTE = “H”)
A
15
/D
15
to A
8
/D
8
(P1)
A
23
/D
7
to A
16
/D
0
(P2)
ALE (P3
2
)
BHE (P3
1
)
R/W (P3
0
)
D(odd): Data at odd address
D(odd)
A
15
— A
8
A
15
/D
15
—
A
8
/D
8
A
15
— A
8
A
15
— A
8
A
23
/D
7
—
A
16
/D
0
A
23
— A
16
D(even): Data at even address
D(even)
A
23
/D
7
—
A
16
/D
0
A
23
— A
16
D: Data
1
(P4
2
)
P4
7
to P4
3
RDY (P4
1
)
HOLD (P4
0
)
P4
7
— P4
3
P: Functions as a programmable I/O port.
(Note 1)
HLDA (P3
3
)
ALE
BHE
R / W
1
H O L D
R D Y
E
;