Reliance electric 57C409, Инструкция по эксплуатации

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4Ć1
4.0 PROGRAMMING
This section describes how the data is organized in the module and
provides examples of how the module is accessed by the application
software. For more detailed information, refer to DCS 5000 Enhanced
BASIC Language Instruction Manual (JĆ3600) or AutoMax Enhanced
BASIC Language Instruction Manual (JĆ3675).
4.1 Register Organization
The data in the input module is organized as eleven 16 bit registers.
There is a set of registers for each analog channel. Channel 0 uses
registers 0,2,5,7, and 9. Channel 1 uses registers 1,3,6,8, and 10.
Register 4 provides status information on the common clock signal
which is shared by both channels.
Registers 0 and 1 contain the 2's complement digital value of the
analog input. The analog to digital converter provides a precision of
12 bits plus sign. It also provides 100% overrange capability. This
means that if the input is maintained within the specified range, the
digital value will vary +4095, with each of the bits containing
significant information. If the input exceeds the specified range, the
digital value will vary +8191, but bit 0 will no longer be significant.
These registers are read only. Refer to figure 4.1.
15 Ă14 Ă 13Ă 12 Ă11 Ă 10 Ă 9 Ă 8 Ă 7 Ă 6 Ă 5 Ă 4Ă 3Ă 2Ă 1 Ă 0
register 0
register 1
sign
sign
channel 0 data
channel 1 data
bits
Figure 4.1 Ć Analog Input Registers
Registers 2 and 3, which are also read only, contain the time
remaining until the next analog to digital conversion. Each count is
equivalent to 500 microseconds. Refer to figure 4.2.
register 2
register 3
current count of update period for channel 0
current count of update period for channel 1
15Ă 14 ă 13 Ă 12 Ă 11 Ă 10 Ă 9 Ă 8 Ă 7 Ă 6 Ă 5 Ă 4 Ă 3 Ă 2 Ă 1 Ă 0 bits
Figure 4.2 Ć Current Count Registers