RCA RDR3600V, Руководство по обслуживанию

Страница: 5 / 55

As picture 4 AFamplifier and squelch
7. Receive signaling
1) QT/DQT
The signal output by U601 enters microprocess (U301) through U201. U301 Determines whether QT or DQT
matches the set value, and controls the SP MUTE and speaker output sound based on this result
2) MSK（Fleet Sync）
The MSK input signal from the FM IC is sent to U201. The signal is mediated in the MSK mediator on
U201. The mediated data is sent to the CPU for processing.
3) DTMF
U601 DTMF output signal to U201. The decoded data has CPU processing.
三、 、 PLL frequency synthesis
The PLL circuit generates the first oscillation signal for reception and the RF signal for emission.
1. PLL
The frequency step of the circuit 5 or 6.25KHz.The output signal of the reference oscillator (VCO) of 16.8MHz is
amplified by Q605 buffer, and then divided by a programmable dual module counter in U601.The frequency division
signals are compared in the corresponding comparators of the U601.The generated signal is filtered through a low-pass
filter and transmitted to the VCO to control the oscillator frequency. (as picture 5)
2. VCO
The frequency used is generated by the Q601 in the transmit mode and is generated by Q603 in the receiving mode.
The oscillation frequency is controlled by feeding the VCO control voltage obtained from the phase comparator to the
shell diode (D607 and D608 in the mode of transmission, D602 and D605 in the reception mode).When receiving, the RX
pin is set to high, so that the Q602 is connected. At launch, the TX pin is set to high, amplifying the Q602 and
transmitting it to the RF amplifier.