EPC-6A Hardware Reference
58
Message High Registers (814Ch and 814Dh)
This register is an extension of the following register for 32-bit messages. An access to
this register clears flag ABMH in the response register.
Message Low Registers 814Eh and 814Fh)
This register is typically used as an incoming message register by doing a D16 write into it
from the VMEbus (this register, as are many others, are mapped into the VMEbus A16
address space, as discussed later).
VME Modifier Register (8151h)
This register is also used when the EPC-6A makes an access through its E page to the
VMEbus. Bits 7 and 6 provide VME address bits A23 and A22, respectively. Bits 2–0
define the value placed on the associated VMEbus address-modifier lines. Register bits
are not defined for the VMEbus address-modifier AM3 and AM0 lines since, for all
defined address-modifier values in the VMEbus specification, AM3 is 1 and AM0 is the
inverse of AM1. Therefore these two bit values are generated by hardware.
AMx
These bits drive the VME address-modifier lines AM4, AM2, and AM1. The
other three VME address-modifier lines are generated automatically: AM5 and
AM3 are always 1 and AM0 is always the inverse of AM1. Thus these three
register bits correspond to the following VMEbus functions:
000
A16 non-privileged access
001
reserved
010
A16 supervisory access
011
reserved
100
A24 non-privileged data access
101
A24 non-privileged program access
110
A24 supervisory data access
111
A24 supervisory program access
IACK This bit, when set, is used to define the VMEbus access as an interrupt
acknowledge cycle. The interrupt being acknowledged must be
encoded by software as a value on VME address lines A1–A3.
Message High Reg, lower
Message High Reg, upper
Message Low Reg, lower
Message Low Reg, upper
VME Modifier Register
VME WA23–22
res
IACK
res
AM4
AM2
AM1
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