RabbitCore RCM2200, Руководство пользователя

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User’s Manual External Interrupts E–3
E.2 Single-Interrupt Request
Tie the inputs for external interrupt #1 and #0
together by adding a 1 k
Ω
resistor between the two
lines. Under this configuration, shown in Figure E–
4, both interrupt #1 and #0 will be requested when
an edge is detected. The #1 interrupt will take place
first since it is of a higher priority.
The interrupt service routine for interrupt #1 should
ignore the interrupt. The actual service routine will
be the service routine for interrupt #0. If an interrupt
is lost, it will always be #1 and never #0. The 1 k
Ω
resistor delays the edge slightly so that interrupt #1
is guaranteed to be latched earlier or simultaneously
with interrupt #0. It is important that the programmed
priority of interrupt #1 be higher than or equal to the
programmed priority of interrupt #0. Normally they
should be equal.
Spurious interrupts, which occur because of a fail-
ure to clear the request latch, are a possibility only if
there are other interrupts of higher priority than
external interrupt #1 and #0. These can only be the
result of programming one of the on-chip periph-
eral interrupts to have a higher interrupt priority.
This could be the case, for example, if the external
interrupts are programmed to have priority 1, and
one of the serial port interrupts is programmed to
have priority 2. Spurious interrupts can always be
eliminated by programming both external interrupts
to have a priority equal to the highest priority used
for another device. The priority can be reduced on
entry to the service routine to avoid blocking the
true high-priority interrupts. External interrupt #1
cannot cause interrupt #0 to have a spurious inter-
rupt or vice versa. In some cases, spurious interrupts
may not disturb function, but the fix is so simple
that it is not usually worth the trouble to analyze this
possibility.
E.3 OR’ed Interrupt Request
Tie the inputs for external interrupt #1 and #0
together by adding a 1 k
Ω
resistor. This configura-
tion is shown in Figure E–5.
Figure E–4:
RabbitCore RCM2200 Configuration
for Single-Interrupt Request
Interrupt Request #1
INT1A
Interrupt Request #0
INT0A
Edge
Detectors
1 k W
Interrupt Request
Figure E–5:
RabbitCore RCM2200 Configuration
for OR’ed Interrupt Request
Edge
Detectors
Interrupt Request #1
INT1A
Interrupt Request #0
INT0A
1 k W
OR'ed Interrupt
Request
1 k W
INT0B
INT1B
OR'ed Interrupt
Request